A general model checking framework for various memory consistency models

T Abe, T Maeda - International Journal on Software Tools for Technology …, 2017 - Springer
Relaxed memory consistency models are common and essential when multiple processes
share a single global address space, such as when using multicore CPUs, distributed …

Fast&furious: A tool for detecting covert racing

A Ros, S Kaxiras - Proceedings of the 6th Workshop on Parallel …, 2015 - dl.acm.org
Existing multi-threaded applications perform synchronization either in an explicit way, eg,
making use of the functionality provided by synchronization libraries or in an implicit or" …

Context-bounded analysis of TSO systems

MF Atig, A Bouajjani, G Parlato - From Programs to Systems. The Systems …, 2014 - Springer
We address the state reachability problem in concurrent programs running over the TSO
weak memory model. This problem has been shown to be decidable with non-primitive …

Partially redundant fence elimination for x86, ARM, and Power processors

R Morisset, F Zappa Nardelli - … of the 26th International Conference on …, 2017 - dl.acm.org
We show how partial redundancy elimination (PRE) can be instantiated to perform provably
correct fence elimination for multi-threaded programs running on top of the x86, ARM and …

Extracting safe thread schedules from incomplete model checking results

P Metzler, N Suri, G Weissenbacher - International Journal on Software …, 2020 - Springer
Abstract Model checkers frequently fail to completely verify a concurrent program, even if
partial-order reduction is applied. The verification engineer is left in doubt whether the …

Parameterized model checking on the tso weak memory model

S Conchon, D Declerck, F Zaïdi - Journal of Automated Reasoning, 2020 - Springer
We present an extended version of the model checking modulo theories framework for
verifying parameterized systems under the TSO weak memory model. Our extension relies …

New lace and arsenic: adventures in weak memory with a program logic

R Bornat, J Alglave, M Parkinson - arXiv preprint arXiv:1512.01416, 2015 - arxiv.org
We describe a program logic for weak memory (also known as relaxed memory). The logic is
based on Hoare logic within a thread, and rely/guarantee between threads. It is presented …

Optimization of a general model checking framework for various memory consistency models

T Abe, T Maeda - Proceedings of the 8th International Conference on …, 2014 - dl.acm.org
While relaxed memory consistency models contribute optimizations of compilers on
multicore CPUs and shared memory distributed programming languages, their relaxedness …

Lock and fence when needed: state space exploration+ static analysis= improved fence and lock insertion

S de Putter, A Wijs - … Formal Methods: 16th International Conference, IFM …, 2020 - Springer
When targeting modern parallel hardware architectures, constructing correct and high-
performing software is complex and time-consuming. In particular, reorderings of memory …

Compiling Parameterized X86-TSO Concurrent Programs to Cubicle

S Conchon, D Declerck, F Zaïdi - International Conference on Formal …, 2017 - Springer
We present PMCx86, a compiler from x86 concurrent programs to Cubicle-W, a model
checker for parameterized weak memory array-based transition systems. Our tool handles …