Sharing, Protection, and Compatibility for Reconfigurable Fabric with {AmorphOS}
Cloud providers such as Amazon and Microsoft have begun to support on-demand FPGA
acceleration in the cloud, and hardware vendors will support FPGAs in future processors. At …
acceleration in the cloud, and hardware vendors will support FPGAs in future processors. At …
Processors, methods, and systems with a configurable spatial accelerator
KE Fleming, KD Glossop, SC Steely Jr, J Tang… - US Patent …, 2020 - Google Patents
2017-08-09 Assigned to INTEL CORPORATION reassignment INTEL CORPORATION
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …
Processors, methods, and systems with a configurable spatial accelerator
K Fleming, KD Glossop, SC Steely Jr - US Patent 10,515,046, 2019 - Google Patents
Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL
TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL …
TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL …
Apparatuses, methods, and systems for operations in a configurable spatial accelerator
KE Fleming, SC Steely Jr, KD Glossop… - US Patent …, 2021 - Google Patents
2019-03-01 Assigned to INTEL CORPORATION reassignment INTEL CORPORATION
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …
Processors, methods, and systems with a configurable spatial accelerator
K Fleming, KD Glossop, SC Steely Jr - US Patent 10,416,999, 2019 - Google Patents
Abstract Systems, methods, and apparatuses relating to a configurable spatial accelerator
are described. In one embodiment, a processor includes a core with a decoder to decode an …
are described. In one embodiment, a processor includes a core with a decoder to decode an …
Processors, methods, and systems with a configurable spatial accelerator having a sequencer dataflow operator
J Tang, KE Fleming, SC Steely, KD Glossop… - US Patent …, 2019 - Google Patents
Abstract Systems, methods, and apparatuses relating to a sequencer dataflow operator of a
configurable spatial accelerator are described. In one embodiment, an interconnect network …
configurable spatial accelerator are described. In one embodiment, an interconnect network …
Processors and methods for privileged configuration in a spatial array
KE Fleming, SC Steely, KD Glossop - US Patent 10,445,098, 2019 - Google Patents
Methods and apparatuses relating to privileged configuration in spatial arrays are described.
In one embodiment, a processor includes processing elements; an interconnect network …
In one embodiment, a processor includes processing elements; an interconnect network …
Processors and methods for pipelined runtime services in a spatial array
K Fleming Jr, SC Steely Jr, KD Glossop - US Patent 10,467,183, 2019 - Google Patents
Methods and apparatuses relating to pipelined runtime services in spatial arrays are
described. In one embodiment, a processor includes processing elements; an interconnect …
described. In one embodiment, a processor includes processing elements; an interconnect …
Just-in-time compilation for verilog: A new technique for improving the FPGA programming experience
FPGAs offer compelling acceleration opportunities for modern applications. However
compilation for FPGAs is painfully slow, potentially requiring hours or longer. We approach …
compilation for FPGAs is painfully slow, potentially requiring hours or longer. We approach …
Compiler-driven FPGA virtualization with SYNERGY
FPGAs are increasingly common in modern applications, and cloud providers now support
on-demand FPGA acceleration in data centers. Applications in data centers run on virtual …
on-demand FPGA acceleration in data centers. Applications in data centers run on virtual …