Time-domain computing in memory using spintronics for energy-efficient convolutional neural network

Y Zhang, J Wang, C Lian, Y Bai, G Wang… - … on Circuits and …, 2021 - ieeexplore.ieee.org
The data transfer bottleneck in Von Neumann architecture owing to the separation between
processor and memory hinders the development of high-performance computing. The …

Detecting and mitigating data-dependent DRAM failures by exploiting current memory content

S Khan, C Wilkerson, Z Wang, AR Alameldeen… - Proceedings of the 50th …, 2017 - dl.acm.org
DRAM cells in close proximity can fail depending on the data content in neighboring cells.
These failures are called data-dependent failures. Detecting and mitigating these failures …

Casper: Accelerating stencil computations using near-cache processing

A Denzler, GF Oliveira, N Hajinazar, R Bera… - IEEE …, 2023 - ieeexplore.ieee.org
Stencil computations are commonly used in a wide variety of scientific applications, ranging
from large-scale weather prediction to solving partial differential equations. Stencil …

Graphide: A graph processing accelerator leveraging in-dram-computing

S Angizi, D Fan - Proceedings of the 2019 on Great Lakes Symposium …, 2019 - dl.acm.org
In this paper, we propose GraphiDe, a novel DRAM-based processing-in-memory (PIM)
accelerator for graph processing. It transforms current DRAM architecture to massively …

Concurrent data structures for near-memory computing

Z Liu, I Calciu, M Herlihy, O Mutlu - … of the 29th ACM Symposium on …, 2017 - dl.acm.org
The performance gap between memory and CPU has grown exponentially. To bridge this
gap, hardware architects have proposed near-memory computing (also called processing-in …

Flash-Cosmos: In-flash bulk bitwise operations using inherent computation capability of nand flash memory

J Park, R Azizi, GF Oliveira… - 2022 55th IEEE/ACM …, 2022 - ieeexplore.ieee.org
Bulk bitwise operations, ie, bitwise operations on large bit vectors, are prevalent in a wide
range of important application domains, including databases, graph processing, genome …

Solar-DRAM: Reducing DRAM access latency by exploiting the variation in local bitlines

J Kim, M Patel, H Hassan… - 2018 IEEE 36th …, 2018 - ieeexplore.ieee.org
DRAM latency is a major bottleneck for many applications in modern computing systems. In
this work, we rigorously characterize the effects of reducing DRAM access latency on 282 …

[PDF][PDF] pluto: In-dram lookup tables to enable massively parallel general-purpose computation

JD Ferreira, G Falcao, J Gómez-Luna… - arXiv preprint arXiv …, 2021 - academia.edu
Data movement between main memory and the processor is a significant contributor to the
execution time and energy consumption of memory-intensive applications. This data …

pluto: Enabling massively parallel computation in dram via lookup tables

JD Ferreira, G Falcao, J Gómez-Luna… - 2022 55th IEEE/ACM …, 2022 - ieeexplore.ieee.org
Data movement between the main memory and the processor is a key contributor to
execution time and energy consumption in memory-intensive applications. This data …

A classification of memory-centric computing

HAD Nguyen, J Yu, MA Lebdeh, M Taouil… - ACM Journal on …, 2020 - dl.acm.org
Technological and architectural improvements have been constantly required to sustain the
demand of faster and cheaper computers. However, CMOS down-scaling is suffering from …