Processing data where it makes sense in modern computing systems: Enabling in-memory computation

O Mutlu - Proceedings of the 2019 on Great Lakes Symposium …, 2019 - dl.acm.org
Today's systems are overwhelmingly designed to move data to computation. This design
choice goes directly against at least three key trends in systems that cause performance …

A survey of resource management for processing-in-memory and near-memory processing architectures

K Khan, S Pasricha, RG Kim - Journal of Low Power Electronics and …, 2020 - mdpi.com
Due to the amount of data involved in emerging deep learning and big data applications,
operations related to data movement have quickly become a bottleneck. Data-centric …

The processing using memory paradigm: In-DRAM bulk copy, initialization, bitwise AND and OR

V Seshadri, O Mutlu - arXiv preprint arXiv:1610.09603, 2016 - arxiv.org
In existing systems, the off-chip memory interface allows the memory controller to perform
only read or write operations. Therefore, to perform any operation, the processor must first …

Fusing in-storage and near-storage acceleration of convolutional neural networks

I Okafor, AK Ramanathan, NR Challapalle, Z Li… - ACM Journal on …, 2023 - dl.acm.org
Video analytics has a wide range of applications and has attracted much interest over the
years. While it can be both computationally and energy-intensive, video analytics can greatly …

Memory-centric computing

O Mutlu - arXiv preprint arXiv:2305.20000, 2023 - arxiv.org
Memory-centric computing aims to enable computation capability in and near all places
where data is generated and stored. As such, it can greatly reduce the large negative …

System and method for in-memory computing

S Jain, A Ranjan, K Roy, A Raghunathan - US Patent 10,073,733, 2018 - Google Patents
A memory capable of carrying out compute-in-memory (CiM) operations is disclosed. The
memory includes a matrix of bit cells having a plurality of bit cells along one or more rows …

Practical Mechanisms for Reducing Processor–Memory Data Movement in Modern Workloads

A Boroumand - 2020 - search.proquest.com
Data movement between the memory system and computation units is one of the most
critical challenges in designing high performance and energy-efficient computing systems …

Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis

İE Yüksel, YC Tuğrul, FN Bostancı… - 2024 54th Annual …, 2024 - ieeexplore.ieee.org
We experimentally analyze the computational capability of commercial off-the-shelf (COTS)
DRAM chips and the robustness of these capabilities under various timing delays between …

A low power in-DRAM architecture for quantized CNNs using fast Winograd convolutions

MM Ghaffar, C Sudarshan, C Weis, M Jung… - Proceedings of the …, 2020 - dl.acm.org
In recent years, the performance and memory bandwidth bottlenecks associated with
memory intensive applications are encouraging researchers to explore Processing in …

Enabling Effective Error Mitigation in Memory Chips That Use On-Die Error-Correcting Codes

M Patel - arXiv preprint arXiv:2204.10387, 2022 - arxiv.org
Improvements in main memory storage density are primarily driven by process technology
scaling, which negatively impacts reliability by exacerbating various circuit-level error …