Prior work shows that Rowhammer attacks---which flip bits in DRAM via frequent activations
of the same row (s)---are viable. Adversaries typically mount these attacks via instruction …

Microarchitectural attacks have plunged Computer Architecture into a security crisis. Yet, as
the slowing of Moore's law justifies the use of ever more exotic microarchitecture, it is likely …

Cache randomization has recently been revived as a promising defense against conflict-
based cache side-channel attacks. As two of the latest implementations, CEASER-S and …

Cache side-channel attacks lead to severe security threats to the settings where a CPU is
shared across users, eg, in the cloud. The majority of attacks rely on sensing the micro …

Microarchitectural side channels are a pressing security threat. These channels are created
when programs modulate hardware resources in a secret data-dependent fashion. They are …

There is a long history of side channels in the memory hierarchy of modern CPUs.
Especially the cache side channel is widely used in the context of transient execution attacks …

In this paper, we propose SassCache, a secure skewed associative cache with keyed index
mapping. For this purpose, we design a new two-layered, low-latency cryptographic …

Shared cache resources in multi-core processors are vulnerable to cache side-channel
attacks. Recently proposed defenses have their own caveats: Randomization-based …

This paper studies the mitigation of memory timing side channels, where attackers utilize
contention within DRAM controllers to infer a victim's secrets. Already practical, this class of …

Cache based side-channel attacks exploit the fact that an adversary can setup the shared
cache memory (the last level cache in modern systems) into a known state and detect any …