Design of a reconfigurable network-on-chip for next generation FPGAs using Dynamic Partial Reconfiguration
R Ahmed, H Mostafa, AH Khalil - Microelectronics Journal, 2021 - Elsevier
Introducing the reconfigurability concept into one of the most ramping and trending design
platforms like the NoC is considered a good opportunity for gaining the most out of them …
platforms like the NoC is considered a good opportunity for gaining the most out of them …
NoC 中负载均衡的AVOQ 路由器设计
欧阳一鸣， 陈静雯， 梁华国， 黄正峰， 杜高明， 安鑫 - 电子测量与仪器学报, 2017 - cqvip.com
针对片上网络中使用虚拟输出队列(VOQ) 机制的路由器在网络拥塞时存在的头阻塞问题,
提出负载均衡的AVOQ 路由器架构. 首先, 输入缓冲区仍使用VOQ 机制来处理头阻塞问题. 其次 …
提出负载均衡的AVOQ 路由器架构. 首先, 输入缓冲区仍使用VOQ 机制来处理头阻塞问题. 其次 …
ASIR: application-specific instruction-set router for NoC-based MPSoCs
J Rettkowski, D Göhringer - Computers, 2018 - mdpi.com
The end of Dennard scaling led to the use of heterogeneous multi-processor systems-on-
chip (MPSoCs). Heterogeneous MPSoCs provide a high efficiency in terms of energy and …
chip (MPSoCs). Heterogeneous MPSoCs provide a high efficiency in terms of energy and …
Hardware implementation of network interface architecture for RISC-V based NoC-MPSoC framework
MKA Nair, PMK Reddy, YL Abijith… - … Conference on VLSI …, 2022 - ieeexplore.ieee.org
With the increasing number of processing elements or IP cores in a System-on-Chip,
Network-on-Chip has become a better solution for on-chip interconnection. RISC-V is an …
Network-on-Chip has become a better solution for on-chip interconnection. RISC-V is an …
Application-specific processing using high-level synthesis for networks-on-chip
J Rettkowski, D Göhringer - 2017 International Conference on …, 2017 - ieeexplore.ieee.org
The end of Dennard scaling led to the use of heterogeneous Multi-Processor Systems-on-
Chip (MPSoCs). Heterogeneous MPSoCs provide a high efficiency in terms of energy and …
Chip (MPSoCs). Heterogeneous MPSoCs provide a high efficiency in terms of energy and …
A case Study: pre-Silicon SoC RAS validation for NoC server processor
S Kan, M Lam, T Porter, J Dworak - 2016 17th International …, 2016 - ieeexplore.ieee.org
In this paper, we propose a model along with a novel methodology to represent and validate
a Network-On-Chip (NoC) server processor's Reliability, Availability, and Serviceability …
a Network-On-Chip (NoC) server processor's Reliability, Availability, and Serviceability …
Impact of dynamic partial reconfiguration on CONNECT Network-on-Chip for FPGAs
R Ahmed, H Mostafa, AH Khalil - 2018 13th International …, 2018 - ieeexplore.ieee.org
This work presents the Dynamic Partial Reconfiguration (DPR) support to CONNECT
Network-on-Chip (NoC) and studies its impact on the network performance. Runtime …
Network-on-Chip (NoC) and studies its impact on the network performance. Runtime …
Parallel IFFT/FFT for MIMO-OFDM LTE on NoC-Based FPGA
The evaluation of wireless communication systems over the last decades has led to a
growing demand for more advanced high-speed communication systems. In this paper, we …
growing demand for more advanced high-speed communication systems. In this paper, we …
Residue monitor enabled charge-mode adaptive echo-cancellation for simultaneous bidirectional signaling over on-chip interconnects
P Venuturupalli, PK Govindaswamy… - Microelectronics …, 2020 - Elsevier
The full-duplex data communication over on-chip global interconnects suffers from large
amounts of amplitude residue echo, leading to the closure of the vertical eye. This work …
amounts of amplitude residue echo, leading to the closure of the vertical eye. This work …
Design of double-ring network-on-chip based on “packet circuit connect”
李桢旻， 马宇晴， 殷海文， 杜高明… - Journal of Electronic …, 2023 - jemi.cnjournals.com
针对包交换片上网络 (NoC) 在大量数据通信情况下性能较差的弱点, 提出了一种基于 “包-
电路”(PCC) 交换的环形拓扑结构片上网络 (DRNoC) 设计架构. 首先这种双环形拓扑结构由内外 …
电路”(PCC) 交换的环形拓扑结构片上网络 (DRNoC) 设计架构. 首先这种双环形拓扑结构由内外 …