Myths and legends in high-performance computing

S Matsuoka, J Domke, M Wahib… - … Journal of High …, 2023 - journals.sagepub.com
In this thought-provoking article, we discuss certain myths and legends that are folklore
among members of the high-performance computing community. We gathered these myths …

A 7-nm FinFET 1.2-TB/s/mm2 3D-Stacked SRAM Module With 0.7-pJ/b Inductive Coupling Interface Using Over-SRAM Coil and Manchester-Encoded Synchronous …

K Shiba, M Okada, A Kosuge… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
A 0.7-pJ/bit, 8.5-Gb/s/link inductive coupling interchip wireless communication interface for a
3D-stacked static-random access memory (SRAM) has been developed in a 7-nm FinFET …

Spatz: A compact vector processing unit for high-performance and energy-efficient shared-L1 clusters

M Cavalcante, D Wüthrich, M Perotti, S Riedel… - Proceedings of the 41st …, 2022 - dl.acm.org
While parallel architectures based on clusters of Processing Elements (PEs) sharing L1
memory are widespread, there is no consensus on how lean their PE should be. Architecting …

Efficiently Removing Sparsity for High-Throughput Stream Processing

P Papaphilippou, Z Que, W Luk - … International Conference on …, 2023 - ieeexplore.ieee.org
Big data analytics and machine learning are increasingly targeted by FPGAs due to their
significant amount of computing capabilities and internal parallelism. Different programming …

[图书][B] Fighting Back the Von Neumann Bottleneck with Small-and Large-Scale Vector Microprocessors

M Cavalcante - 2023 - books.google.com
In his seminal Turing Award Lecture, Backus discussed the issues stemming from the word-
at-a-time style of programming inherited from the von Neumann computer. More than forty …