This book is a summary of the authors' many years of research in the field of logic synthesis. These studies concentrated in the areas of function decomposition, technological mapping …
A Barkalov, L Titarenko, K Mielcarek - International Journal of Applied …, 2018 - sciendo.com
A method is proposed targeting a decrease in the number of LUTs in circuits of FPGA-based Mealy FSMs. The method improves hardware consumption for Mealy FSMs with the …
M Kubica, D Kania - Bulletin of the Polish Academy of Sciences …, 2019 - yadda.icm.edu.pl
This paper presents an innovative method of technology mapping of the circuits in ALM appearing in FPGA devices by Intel. The essence of the idea is based on using triangle …
Methods for reducing power consumption in circuits of finite state machines (FSMs) are discussed in this review. The review outlines the main approaches to solving this problem …
M Kubica, D Kania - Bulletin of the Polish Academy of Sciences …, 2017 - yadda.icm.edu.pl
The main goal of the paper is to present a logic synthesis strategy dedicated to an LUT- based FPGA. New elements of the proposed synthesis strategy include: an original method …
M Kubica, A Opara, D Kania - Microprocessors and Microsystems, 2017 - Elsevier
The paper presents theoretical background of a new concept of logic synthesis for LUT– based FPGAs. The idea of multi-output function description in the form of PMTBDD diagram …
A Opara, M Kubica, D Kania - IEEE Access, 2019 - ieeexplore.ieee.org
Physical systems may be carried out in both hardware and software. Hardware is based on implementing appropriate logic functions in FPGA structures connected with a physical layer …
M Kubica, D Kania, J Kulisz - IEEE Access, 2019 - ieeexplore.ieee.org
A logic synthesis for finite-state machines (FSMs) aimed at programmable array logic (PAL)- based complex programmable logic devices is proposed here. This approach consists of the …
A Opara, M Kubica, D Kania - Integration, 2018 - Elsevier
The paper presents a synthesis strategy oriented to the implementation of multi-output functions into LUT-based FPGA. The key elements of the proposed method include the …