Practically, any digital system includes sequential blocks represented using a model of finite
state machine (FSM). It is very important to improve such FSM characteristics as the number …

This book is a summary of the authors' many years of research in the field of logic synthesis.
These studies concentrated in the areas of function decomposition, technological mapping …

A method is proposed targeting a decrease in the number of LUTs in circuits of FPGA-based
Mealy FSMs. The method improves hardware consumption for Mealy FSMs with the …

This paper presents an innovative method of technology mapping of the circuits in ALM
appearing in FPGA devices by Intel. The essence of the idea is based on using triangle …

Methods for reducing power consumption in circuits of finite state machines (FSMs) are
discussed in this review. The review outlines the main approaches to solving this problem …

The main goal of the paper is to present a logic synthesis strategy dedicated to an LUT-
based FPGA. New elements of the proposed synthesis strategy include: an original method …

The paper presents theoretical background of a new concept of logic synthesis for LUT–
based FPGAs. The idea of multi-output function description in the form of PMTBDD diagram …

Physical systems may be carried out in both hardware and software. Hardware is based on
implementing appropriate logic functions in FPGA structures connected with a physical layer …

A logic synthesis for finite-state machines (FSMs) aimed at programmable array logic (PAL)-
based complex programmable logic devices is proposed here. This approach consists of the …

The paper presents a synthesis strategy oriented to the implementation of multi-output
functions into LUT-based FPGA. The key elements of the proposed method include the …