A microprocessor system comprises a computational array and a hardware data formatter.
The computational array includes a plurality of computation units that each operates on a …

A microprocessor system comprises a computational array and a vector computational unit.
The computational array includes a plurality of computation units. The vector computational …

Machine learning and artificial intelligence operations often rely on the repeated application
of a set of specific machine learning processor operations over very large datasets …

Various embodiments of the disclosure relate to an accelerated mathematical engine. In
certain embodiments, the accelerated mathematical engine is applied to image processing …

Abstract Systems and methods for tokenization to support pseudonymization are provided
herein. An example method includes receiving an input set, seeding a random number …

G06F7/48—Methods or arrangements for performing computations using exclusively
denominational number representation, eg using binary, ternary, decimal representation …

Techniques are disclosed for managing data within a reconfigurable computing
environment. In a multiple processing element environment, such as a mesh network or …

Apparatuses and methods are disclosed for an FPGA architecture that may improve
processing speed and efficiency in processing less complex operands. Some applications …

Apparatuses and methods are disclosed for an FPGA architecture that may improve
processing speed and efficiency in processing less complex operands. Some applications …

An array processor includes a managing element having a load streaming unit coupled to
multiple processing elements. The load streaming unit provides input data portions to each …