A new adaptive selection strategy for reducing latency in networks on chip

M Trik, H Akhavan, AM Bidgoli, AMNG Molk, H Vashani… - Integration, 2023 - Elsevier
Networks on chips (NoCs) are a concept inspired by computer networks for constructing
multiprocessor systems that can handle communication across processing cores. One of the …

A hybrid selection strategy based on traffic analysis for improving performance in networks on chip

M Trik, AMNG Molk, F Ghasemi… - Journal of …, 2022 - Wiley Online Library
Networks on chip (NoCs) are an idea for implementing multiprocessor systems that have
been able to handle the communication between processing cores, inspired by computer …

Providing an Adaptive Routing along with a Hybrid Selection Strategy to Increase Efficiency in NoC‐Based Neuromorphic Systems

M Trik, S Pour Mozaffari… - Computational …, 2021 - Wiley Online Library
Effective and efficient routing is one of the most important parts of routing in NoC‐based
neuromorphic systems. In fact, this communication structure connects different units through …

DBAR: an efficient routing algorithm to support multiple concurrent applications in networks-on-chip

S Ma, N Enright Jerger, Z Wang - Proceedings of the 38th annual …, 2011 - dl.acm.org
With the emergence of many-core architectures, it is quite likely that multiple applications will
run concurrently on a system. Existing locally and globally adaptive routing algorithms …

[PDF][PDF] Overview of Intelligent Signal Processing Systems

KCJ Chen, WH Peng, CGG Lee - APSIPA Transactions on …, 2023 - nowpublishers.com
ABSTRACT Niklaus Emil Wirth introduced the innovative concept of Programming=
Algorithm+ Data Structure [109]. Inspired by this, we advance the concept to the next level by …

Application specific routing algorithms for networks on chip

M Palesi, R Holsmark, S Kumar… - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
In this paper we present a methodology to develop efficient and deadlock free routing
algorithms for Network-on-Chip (NoC) platforms which are specialized for an application or …

[图书][B] Network-on-chip: the next generation of system-on-chip integration

S Kundu, S Chattopadhyay - 2014 - library.oapen.org
Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …

A cyber-physical systems approach to personalized medicine: challenges and opportunities for noc-based multicore platforms

P Bogdan - 2015 Design, Automation & Test in Europe …, 2015 - ieeexplore.ieee.org
This paper describes a few fundamental challenges concerning the design of Network-on-
Chip (NoC) based multicores as the backbone of cyber-physical systems (CPS) for …

HARAQ: congestion-aware learning model for highly adaptive routing algorithm in on-chip networks

M Ebrahimi, M Daneshtalab… - 2012 IEEE/ACM …, 2012 - ieeexplore.ieee.org
The occurrence of congestion in on-chip networks can severely degrade the performance
due to increased message latency. In mesh topology, minimal methods can propagate …

Path-diversity-aware fault-tolerant routing algorithm for network-on-chip systems

YY Chen, EJ Chang, HK Hsin… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Network-on-Chip (NoC) is the regular and scalable design architecture for chip
multiprocessor (CMP) systems. With the increasing number of cores and the scaling of …