A low-cost reduced-latency dram architecture with dynamic reconfiguration of row decoder
F Bai, S Wang, X Jia, Y Guo, B Yu… - … Transactions on Very …, 2022 - ieeexplore.ieee.org
DRAM latency has remained almost constant over decades and has become a performance
bottleneck of computing systems. In this study, we propose a low-cost DRAM architecture …
bottleneck of computing systems. In this study, we propose a low-cost DRAM architecture …