A Reconfigurable Non-Uniform Power-Combining V-Band PA With +17.9 dBm Psat and 26.5% PAE in 16-nm FinFET CMOS
KD Chu, S Callender, Y Wang… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
This article presents the design of a dual-mode V-band power amplifier (PA) that enhances
the efficiency at power back-off (PBO) using load modulation. The PA utilizes a …
the efficiency at power back-off (PBO) using load modulation. The PA utilizes a …
A 21-dBm 3.7 W/mm² 28.7% PAE 64-GHz power amplifier in 22-nm FD-SOI
This letter presents the design of a 64-GHz power amplifier (PA) in a 22-nm FD-SOI CMOS
technology. Benefiting from optimized pseudodifferential cascode gain cells as well as the …
technology. Benefiting from optimized pseudodifferential cascode gain cells as well as the …
A Two-Way Power-Combining 60GHz CMOS Power Amplifier with 22.0% PAE and 19.4 dBm Psat in 65nm Bulk CMOS
In this paper, the analysis and design of a 57-64 CMOS Power Amplifier is discussed. The
power-combining technique and the capacitor neutralization technique are applied to boost …
power-combining technique and the capacitor neutralization technique are applied to boost …
[图书][B] Area and power reduction techniques for millimeter-wave phased-array transceiver front-ends
KD Chu - 2021 - search.proquest.com
The demands for higher data rates continue to drive research for consumer products to
develop new techniques for low-cost and long battery-life wireless radios. This dissertation …
develop new techniques for low-cost and long battery-life wireless radios. This dissertation …
A novel stair‐finger grid type transistor for high‐performance millimeter‐wave power amplifier
L Li, Z Zhang - Microwave and Optical Technology Letters, 2022 - Wiley Online Library
A novel stair‐finger grid type (SFGT) transistor layout is proposed in this letter to improve the
f T f_T and f max f_\max of large‐sized transistors for the millimeter‐wave power amplifier …
f T f_T and f max f_\max of large‐sized transistors for the millimeter‐wave power amplifier …
A 60-GHz Two-Way Transformer-Coupled Power Amplifier in 65-nm CMOS
This paper presents a 60-GHz transformer-coupled power amplifier (PA). It is composed of
three-stage PA and a distributed-active-transformer-based (DAT-based) structure is …
three-stage PA and a distributed-active-transformer-based (DAT-based) structure is …
A 38-GHz power amplifier with high efficiency and low quiescent power for phased array applications in 65-nm CMOS process
H Wang, YT Chou, JL Lin… - 2017 IEEE MTT-S …, 2017 - ieeexplore.ieee.org
This paper presents a 38-GHz power amplifier (PA) implemented in 65-nm CMOS process
for phased-array applications. The design targets of the PA are medium output power and …
for phased-array applications. The design targets of the PA are medium output power and …