LDPC block and convolutional codes based on circulant matrices
RM Tanner, D Sridhara, A Sridharan… - IEEE Transactions …, 2004 - ieeexplore.ieee.org
A class of algebraically structured quasi-cyclic (QC) low-density parity-check (LDPC) codes
and their convolutional counterparts is presented. The QC codes are described by sparse …
and their convolutional counterparts is presented. The QC codes are described by sparse …
Iterative decoding threshold analysis for LDPC convolutional codes
M Lentmaier, A Sridharan, DJ Costello… - IEEE Transactions …, 2010 - ieeexplore.ieee.org
An iterative decoding threshold analysis for terminated regular LDPC convolutional
(LDPCC) codes is presented. Using density evolution techniques, the convergence behavior …
(LDPCC) codes is presented. Using density evolution techniques, the convergence behavior …
[PDF][PDF] A class of group-structured LDPC codes
A Class of Group-Structured LDPC Codes Page 1 A Class of Group-Structured LDPC Codes
R. Michael Tanner Deepak Sridhara and Tom Fuja1 Computer Science Department Dept. of …
R. Michael Tanner Deepak Sridhara and Tom Fuja1 Computer Science Department Dept. of …
Low-complexity high-speed decoder design for quasi-cyclic LDPC codes
Z Wang, Z Cui - IEEE Transactions on Very Large Scale …, 2007 - ieeexplore.ieee.org
This paper studies low-complexity high-speed decoder architectures for quasi-cyclic low
density parity check (QC-LDPC) codes. Algorithmic transformation and architectural level …
density parity check (QC-LDPC) codes. Algorithmic transformation and architectural level …
Overlapped message passing for quasi-cyclic low-density parity check codes
Y Chen, KK Parhi - IEEE Transactions on Circuits and Systems I …, 2004 - ieeexplore.ieee.org
In this paper, a systematic approach is proposed to develop a high throughput decoder for
quasi-cyclic low-density parity check (LDPC) codes, whose parity check matrix is …
quasi-cyclic low-density parity check (LDPC) codes, whose parity check matrix is …
Construction of high-girth QC-LDPC codes
Y Wang, JS Yedidia, SC Draper - 2008 5th International …, 2008 - ieeexplore.ieee.org
We describe a hill-climbing algorithm that constructs high-girth quasi-cyclic low-density
parity check (QC-LDPC) codes. Given a desired girth, the algorithm can find QC-LDPC …
parity check (QC-LDPC) codes. Given a desired girth, the algorithm can find QC-LDPC …
LDPC code construction with flexible hardware implementation
DE Hocevar - … Conference on Communications, 2003. ICC'03., 2003 - ieeexplore.ieee.org
This paper presents an LDPC code construction technique for irregular codes of various
block sizes and code rates, thus obtaining the performance benefit of irregular distributions …
block sizes and code rates, thus obtaining the performance benefit of irregular distributions …
A FPGA and ASIC implementation of rate 1/2, 8088-b irregular low density parity check decoder
Y Chen, D Hocevar - GLOBECOM'03. IEEE Global …, 2003 - ieeexplore.ieee.org
This paper presents an implementation of irregular low density parity check decoder using
both FPGA and ASIC. The considered low density parity check code has code rate 1/2 …
both FPGA and ASIC. The considered low density parity check code has code rate 1/2 …
Complexity of solvable cases of the decision problem for the predicate calculus
HR Lewis - 19th Annual Symposium on Foundations of …, 1978 - ieeexplore.ieee.org
We analyze the computational complexity of determining whether F is satisfiable when F is a
formula of the classical predicate calculus which obeys certain syntactic restrictions. For …
formula of the classical predicate calculus which obeys certain syntactic restrictions. For …
Hierarchical and high-girth QC LDPC codes
Y Wang, SC Draper, JS Yedidia - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
We present an approach to designing capacity-approaching high-girth low-density parity-
check (LDPC) codes that are friendly to hardware implementation, and compatible with …
check (LDPC) codes that are friendly to hardware implementation, and compatible with …