A survey on application mapping strategies for network-on-chip design
PK Sahu, S Chattopadhyay - Journal of systems architecture, 2013 - Elsevier
Application mapping is one of the most important dimensions in Network-on-Chip (NoC)
research. It maps the cores of the application to the routers of the NoC topology, affecting the …
research. It maps the cores of the application to the routers of the NoC topology, affecting the …
Predictable mapping of streaming applications on multiprocessors
S Stuijk - 2007 - research.tue.nl
Het ontwerp van nieuwe consumentenelektronica wordt voortdurend complexer omdat er
steeds meer functionaliteit in deze apparaten geintegreerd wordt. Een voorspelbaar …
steeds meer functionaliteit in deze apparaten geintegreerd wordt. Een voorspelbaar …
TDM virtual-circuit configuration for network-on-chip
In network-on-chip (NoC), time-division-multiplexing (TDM) virtual circuits (VCs) have been
proposed to satisfy the quality-of-service requirements of applications. TDM VC is a …
proposed to satisfy the quality-of-service requirements of applications. TDM VC is a …
A Unified Approach to Mapping and Routing on a Network‐on‐Chip for Both Best‐Effort and Guaranteed Service Traffic
A Hansson, K Goossens, A Rădulescu - VLSI design, 2007 - Wiley Online Library
One of the key steps in Network‐on‐Chip‐based design is spatial mapping of cores and
routing of the communication between those cores. Known solutions to the mapping and …
routing of the communication between those cores. Known solutions to the mapping and …
Qos scheduling for nocs: Strict priority queueing versus weighted round robin
Y Qian, Z Lu, Q Dou - 2010 IEEE International Conference on …, 2010 - ieeexplore.ieee.org
Strict Priority Queueing (SPQ) andWeighted Round Robin (WRR) are two common
scheduling techniques to achieve Quality-of-Service (QoS) while using shared resources …
scheduling techniques to achieve Quality-of-Service (QoS) while using shared resources …
Design and implementation of hybrid cloud computing architecture based on cloud bus
C Zou, H Deng, Q Qiu - … conference on Mobile ad-hoc and …, 2013 - ieeexplore.ieee.org
A new model of hybrid cloud computing architecture based on cloud bus is proposed. The
system is based on local private cloud, combined with one or more type (s) of public cloud …
system is based on local private cloud, combined with one or more type (s) of public cloud …
Post-silicon platform for the functional diagnosis and debug of networks-on-chip
R Abdel-Khalek, V Bertacco - ACM Transactions on Embedded …, 2014 - dl.acm.org
The increasing number of units in today's systems-on-chip and multicore processors has led
to complex intra-chip communication solutions. Specifically, Networks-on-Chip (NoCs) have …
to complex intra-chip communication solutions. Specifically, Networks-on-Chip (NoCs) have …
Channel trees: Reducing latency by sharing time slots in time-multiplexed networks on chip
A Hansson, M Coenen, K Goossens - Proceedings of the 5th IEEE/ACM …, 2007 - dl.acm.org
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on
Chip communication infrastructure. A growing number of applications, often with firm (FRT) …
Chip communication infrastructure. A growing number of applications, often with firm (FRT) …
Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip
Configuring Time-Division-Multiplexing (TDM) Virtual Circuits (VCs) for network-on-chip
must guarantee conflict freedom for overlapping VCs besides allocating sufficient time slots …
must guarantee conflict freedom for overlapping VCs besides allocating sufficient time slots …
Resource-efficient routing and scheduling of time-constrained streaming communication on networks-on-chip
Network-on-chip-based multiprocessor systems-on-chip are considered as future embedded
systems platforms. One of the steps in mapping an application onto such a parallel platform …
systems platforms. One of the steps in mapping an application onto such a parallel platform …