[HTML][HTML] A survey on processing-in-memory techniques: Advances and challenges

K Asifuzzaman, NR Miniskar, AR Young, F Liu… - … , Devices, Circuits and …, 2023 - Elsevier
Abstract Processing-in-memory (PIM) techniques have gained much attention from computer
architecture researchers, and significant research effort has been invested in exploring and …

DAMOV: A new methodology and benchmark suite for evaluating data movement bottlenecks

GF Oliveira, J Gómez-Luna, L Orosa, S Ghose… - IEEE …, 2021 - ieeexplore.ieee.org
Data movement between the CPU and main memory is a first-order obstacle against improv
ing performance, scalability, and energy efficiency in modern systems. Computer systems …

Energy efficient computing systems: Architectures, abstractions and modeling to techniques and standards

R Muralidhar, R Borovica-Gajic, R Buyya - ACM Computing Surveys …, 2022 - dl.acm.org
Computing systems have undergone a tremendous change in the last few decades with
several inflexion points. While Moore's law guided the semiconductor industry to cram more …

True Nonvolatile High‐Speed DRAM Cells Using Tailored Ultrathin IGZO

Q Hu, C Gu, Q Li, S Zhu, S Liu, Y Li, L Zhang… - Advanced …, 2023 - Wiley Online Library
Severe power consumption in the continuous scaling of Silicon‐based dynamic random
access memory (DRAM) technology quests for a transistor technology with a much lower off …

Demystifying complex workload-DRAM interactions: An experimental study

S Ghose, T Li, N Hajinazar, DS Cali… - Proceedings of the ACM on …, 2019 - dl.acm.org
It has become increasingly difficult to understand the complex interactions between modern
applications and main memory, composed of Dynamic Random Access Memory (DRAM) …

Heteroos: Os design for heterogeneous memory management in datacenter

S Kannan, A Gavrilovska, V Gupta… - Proceedings of the 44th …, 2017 - dl.acm.org
Heterogeneous memory management combined with server virtualization in datacenters is
expected to increase the software and OS management complexity. State-of-the-art …

Autotm: Automatic tensor movement in heterogeneous memory systems using integer linear programming

M Hildebrand, J Khan, S Trika, J Lowe-Power… - Proceedings of the …, 2020 - dl.acm.org
Memory capacity is a key bottleneck for training large scale neural networks. Intel® Optane#
8482; DC PMM (persistent memory modules) which are available as NVDIMMs are a …

Main memory in HPC: Do we need more or could we live with less?

D Zivanovic, M Pavlovic, M Radulovic, H Shin… - ACM Transactions on …, 2017 - dl.acm.org
An important aspect of High-Performance Computing (HPC) system design is the choice of
main memory capacity. This choice becomes increasingly important now that 3D-stacked …

A performance & power comparison of modern high-speed dram architectures

S Li, D Reddy, B Jacob - Proceedings of the International Symposium on …, 2018 - dl.acm.org
To feed the high degrees of parallelism in modern graphics processors and manycore CPU
designs, DRAM manufacturers have created new DRAM architectures that deliver high …

Klocs: Kernel-level object contexts for heterogeneous memory systems

S Kannan, Y Ren, A Bhattacharjee - Proceedings of the 26th ACM …, 2021 - dl.acm.org
Heterogeneous memory systems promise better performance, energy-efficiency, and cost
trade-offs in emerging systems. But delivering on this promise requires efficient OS …