Leakage and Thermal Reliability Optimization of Stacked Nanosheet Field-Effect Transistors with SiC Layers
C Li, Y Shao, F Kuang, F Liu, Y Wang, X Li, Y Zhuang - Micromachines, 2024 - mdpi.com
In this work, we propose a SiC-NSFET structure that uses a PTS scheme only under the
gate, with SiC layers under the source and drain, to improve the leakage current and thermal …
gate, with SiC layers under the source and drain, to improve the leakage current and thermal …