Fundamentally understanding and solving rowhammer
We provide an overview of recent developments and future directions in the RowHammer
vulnerability that plagues modern DRAM (Dynamic Random Memory Access) chips, which …
vulnerability that plagues modern DRAM (Dynamic Random Memory Access) chips, which …
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips
To understand and improve DRAM performance, reliability, security, and energy efficiency,
prior works study characteristics of commodity DRAM chips. Unfortunately, state-of-the-art …
prior works study characteristics of commodity DRAM chips. Unfortunately, state-of-the-art …
Siloz: Leveraging DRAM Isolation Domains to Prevent Inter-VM Rowhammer
Today's cloud DRAM lacks strong isolation primitives, highlighted by Rowhammer bit flips.
Rowhammer poses an increasing threat to cloud security/reliability, given (1) DRAM …
Rowhammer poses an increasing threat to cloud security/reliability, given (1) DRAM …
CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost
DRAM chips are increasingly more vulnerable to read-disturbance phenomena (eg,
RowHammer and RowPress), where repeatedly accessing DRAM rows causes bitflips in …
RowHammer and RowPress), where repeatedly accessing DRAM rows causes bitflips in …
[PDF][PDF] ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation
We introduce ABACuS, a new low-cost hardware-counterbased RowHammer mitigation
technique that performance-, energy-, and area-efficiently scales with worsening …
technique that performance-, energy-, and area-efficiently scales with worsening …
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
Read disturbance in modern DRAM chips is a widespread phenomenon and is reliably used
for breaking memory isolation, a fundamental building block for building robust systems …
for breaking memory isolation, a fundamental building block for building robust systems …
How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM
Error-correcting code (ECC) has been widely used in DRAM-based memory systems to
address the exacerbating random errors following the fabrication process scaling. However …
address the exacerbating random errors following the fabrication process scaling. However …
Leveraging Adversarial Detection to Enable Scalable and Low Overhead RowHammer Mitigations
RowHammer is a prime example of read disturbance in DRAM where repeatedly accessing
(hammering) a row of DRAM cells (DRAM row) induces bitflips in other physically nearby …
(hammering) a row of DRAM cells (DRAM row) induces bitflips in other physically nearby …
Retrospective: RAIDR: Retention-Aware Intelligent DRAM Refresh
O Mutlu - arXiv preprint arXiv:2306.16024, 2023 - arxiv.org
Dynamic Random Access Memory (DRAM) is the prevalent memory technology used to
build main memory systems of almost all computers. A fundamental shortcoming of DRAM is …
build main memory systems of almost all computers. A fundamental shortcoming of DRAM is …
Understanding Read Disturbance in High Bandwidth Memory: An Experimental Analysis of Real HBM2 DRAM Chips
DRAM read disturbance is a significant and worsening safety, security, and reliability issue
of modern DRAM chips that can be exploited to break memory isolation. Two prominent …
of modern DRAM chips that can be exploited to break memory isolation. Two prominent …