Low overhead optimal parity codes

N Koppala, C Subhas - … Computing Electronics and Control), 2022 - telkomnika.uad.ac.id
The error detecting and correcting codes are used in critical applications like in intensive
care units, defense applications, and require highly reliable data. This brief focuses on …

Low delay single error correction and double adjacent error correction (SEC-DAEC) codes

J Li, P Reviriego, L Xiao, Z Liu, L Li, A Ullah - Microelectronics Reliability, 2019 - Elsevier
In recent years, there has been a growing interest in codes that can correct adjacent bit
errors in memories. This is due to the increasing percentage of radiation induced errors that …

Scheme for periodical concurrent fault detection in parallel CRC circuits

J Li, S Liu, P Reviriego, L Xiao… - IET Computers & Digital …, 2020 - Wiley Online Library
As technology scales down, circuits are more prone to incur in faults and fault detection is
necessary to ensure the system reliability. However, fault‐detection circuits are also …

Correction Masking: a technique to implement efficient SET tolerant error correction decoders

H Liu, P Reviriego, C Argyrides… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Single Event Transients (SETs) can be a major concern for combinational circuits. Its
importance grows as technology scales because a small charge can create a large …

Proficient Adjacent Error Correcting Codes

K Neelima, C Subhas - 2023 IEEE 3rd International …, 2023 - ieeexplore.ieee.org
As technology scales down, the semiconductor memories undergo radiation effects due to
congestion which may be recovered called as soft errors. This paper develops three …

Fault Tolerance Method for Memory Based on Inner Product Similarity and Experimental Study on Heavy Ion Irradiation

C Shao, H Li, G Du, J Guo, Z Miao… - Journal of Circuits …, 2022 - World Scientific
As the feature sizes of integrated circuits are reduced to the nanometer scale, the total soft
error rate (SER) in memory and the proportion of multiple bit upsets (MBUs) are significantly …

Efficient concurrent error detection for SEC-DAEC encoders

J Li, P Reviriego, C Argyrides… - 2019 IEEE 25th …, 2019 - ieeexplore.ieee.org
In the last decade, a number of Single Error Correction Double Adjacent Error Correction
(SEC-DAEC) codes have been proposed to protect memories against Multiple Cell Upsets …