Two major trends in high-performance computing, namely, larger numbers of cores and the
growing size of on-chip cache memory, are creating significant challenges for evaluating the …

Benchmarking has become one of the most important methods for quantitative performance
evaluation of processor and computer system designs. Benchmarking of modern …

This paper presents and characterizes the Princeton Application Repository for Shared-
Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors …

This paper presents a surprising result: changing a seemingly innocuous aspect of an
experimental setup can cause a systems researcher to draw wrong conclusions from an …

Locating moving objects in a video sequence is the first step of many computer vision
applications. Among the various motion-detection techniques, background subtraction …

This paper studies the impact of L2 cache sharing on threads that simultaneously share the
cache, on a chip multi-processor (CMP) architecture. Cache sharing impacts threads …

Modern processors use two or more levels ofcache memories to bridge the rising disparity
betweenprocessor and memory speeds. Compression canimprove cache performance by …

With the widening gap between processor and memory speeds, memory system designers
may find cache compression beneficial to increase cache capacity and reduce off-chip …

Timing-accurate full-system multiprocessor simulations can take years because of
architecture and application complexity. Statistical sampling makes simulation-based …

This paper presents CMP Cooperative Caching, a unified framework to manage a CMP's
aggregate on-chip cache resources. Cooperative caching combines the strengths of private …