Implementations disclosed herein provide systems and methods for managing memory
access operations through a flash memory interface of a memory array of a solid-state …

A method is provided for use in a storage system to dynamically disable and enable
prefetching, comprising: defining a first plurality of time windows; calculating a first plurality …

Abstract Systems and methods for object-based data storage are provided. There may be a
read/write cache configured to cache objects to be written to an object-based data storage. A …

An electronic device includes a cache, a processing cluster having one or more processors,
and prefetch throttling circuitry that determines a congestion level of the processing cluster …

US20230185715A1 - Queue optimization via predicitve caching in cloud computing - Google
Patents US20230185715A1 - Queue optimization via predicitve caching in cloud computing …

Embodiments of the present disclosure relate to a memory system and an operating method
of the memory system. According to embodiments of the present disclosure, the memory …

An arithmetic processing device includes circuitry configured to add an identifier of a request
source that generates a prefetch request into the prefetch request, and output, in response to …