MLCAD: A survey of research in machine learning for CAD keynote paper

M Rapp, H Amrouch, Y Lin, B Yu… - … on Computer-Aided …, 2021 - ieeexplore.ieee.org
Due to the increasing size of integrated circuits (ICs), their design and optimization phases
(ie, computer-aided design, CAD) grow increasingly complex. At design time, a large design …

On learning-based methods for design-space exploration with high-level synthesis

HY Liu, LP Carloni - Proceedings of the 50th annual design automation …, 2013 - dl.acm.org
This paper makes several contributions to address the challenge of supervising HLS tools
for design space exploration (DSE). We present a study on the application of learning-based …

Learning-based application-agnostic 3D NoC design for heterogeneous manycore systems

BK Joardar, RG Kim, JR Doppa… - IEEE Transactions …, 2018 - ieeexplore.ieee.org
The rising use of deep learning and other big-data algorithms has led to an increasing
demand for hardware platforms that are computationally powerful, yet energy-efficient. Due …

Graph neural networks for high-level synthesis design space exploration

L Ferretti, A Cini, G Zacharopoulos, C Alippi… - ACM Transactions on …, 2022 - dl.acm.org
High-level Synthesis (HLS) Design-Space Exploration (DSE) aims at identifying Pareto-
optimal synthesis configurations whose exhaustive search is unfeasible due to the design …

Lattice-traversing design space exploration for high level synthesis

L Ferretti, G Ansaloni, L Pozzi - 2018 IEEE 36th International …, 2018 - ieeexplore.ieee.org
This paper describes a design space exploration methodology for High Level Synthesis
(HLS) frameworks. Inputs of HLS tools are a description (usually in C/C++) of the …

FIST: A feature-importance sampling and tree-based method for automatic design flow parameter tuning

Z Xie, GQ Fang, YH Huang, H Ren… - 2020 25th Asia and …, 2020 - ieeexplore.ieee.org
Design flow parameters are of utmost importance to chip design quality and require a
painfully long time to evaluate their effects. In reality, flow parameter tuning is usually …

The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems

F Herrera, H Posadas, P Peñil, E Villar, F Ferrero… - Journal of Systems …, 2014 - Elsevier
The design of embedded systems is being challenged by their growing complexity and tight
performance requirements. This paper presents the COMPLEX UML/MARTE Design Space …

MOOS: A multi-objective design space exploration and optimization framework for NoC enabled manycore systems

A Deshwal, NK Jayakodi, BK Joardar… - ACM Transactions on …, 2019 - dl.acm.org
The growing needs of emerging applications has posed significant challenges for the design
of optimized manycore systems. Network-on-Chip (NoC) enables the integration of a large …

A learning-based recommender system for autotuning design flows of industrial high-performance processors

J Kwon, MM Ziegler, LP Carloni - Proceedings of the 56th Annual Design …, 2019 - dl.acm.org
Logic synthesis and physical design (LSPD) tools automate complex design tasks
previously performed by human designers. One time-consuming task that remains manual is …

SPIRIT: Spectral-aware Pareto iterative refinement optimization for supervised high-level synthesis

S Xydis, G Palermo, V Zaccaria… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
Supervised high-level synthesis (HLS) is a new class of design problems where exploration
strategies play the role of supervisor for tuning an HLS engine. The complexity of the …