Pipelined ADPCM Compression for HDR Synthesis on an FPGA
M Nishimura, T Manabe, Y Shibata - IEICE Transactions on …, 2024 - search.ieice.org
This paper presents an FPGA implementation of real-time high dynamic range (HDR)
synthesis, which expresses a wide dynamic range by combining multiple images with …
synthesis, which expresses a wide dynamic range by combining multiple images with …