A 17.5-to-20.94 GHz and 35-to-41.88 GHz PLL in 65nm CMOS for wireless HD applications
O Richard, A Siligaris, F Badets… - … Solid-State Circuits …, 2010 - ieeexplore.ieee.org
This work shows a complete PLL that is integrated in standard industrial 65nm CMOS
technology. This frequency synthesizer is fully compliant with IEEE 802.15. 3c normalization …
technology. This frequency synthesizer is fully compliant with IEEE 802.15. 3c normalization …
[引用][C] A 17.5-to-20.94 GHz and 35-to-41.88 GHz PLL in 65nm CMOS for wireless HD applications
O Richard, A Siligaris, F Badets, C Dehos… - 2010 IEEE International …, 2010 - cir.nii.ac.jp
[PDF][PDF] ISSCC 2010/SESSION 13/FREQUENCY & CLOCK SYNTHESIS/13.5
O Richard, A Siligaris, F Badets, C Dehos, C Dufis… - picture.iczhiku.com
This work shows a complete PLL that is integrated in standard industrial 65nm CMOS
technology. This frequency synthesizer is fully compliant with IEEE 802.15. 3c normalization …
technology. This frequency synthesizer is fully compliant with IEEE 802.15. 3c normalization …
A 17.5-to-20.94 GHz and 35-to-41.88 GHz PLL in 65nm CMOS for wireless HD applications
O Richard, A Siligaris, F Badets, C Dehos, C Dufis… - 2010 IEEE International … - infona.pl
A complete frequency synthesizer occupying 1.1 mm 2 in 65 nm CMOS is presented. It is
composed of a push-push quadrature VCO that delivers two L0 signals in 20 and 40 GHz …
composed of a push-push quadrature VCO that delivers two L0 signals in 20 and 40 GHz …