Td-nuca: runtime driven management of nuca caches in task dataflow programming models

P Caheny, L Alvarez, M Casas… - … Conference for High …, 2022 - ieeexplore.ieee.org
In high performance processors, the design of on-chip memory hierarchies is crucial for
performance and energy efficiency. Current processors rely on large shared Non-Uniform …

TD-NUCA: runtime driven management of NUCA caches in task dataflow programming models

P Caheny, L Álvarez Martí, M Casas… - … of SC22: The …, 2022 - upcommons.upc.edu
In high performance processors, the design of on-chip memory hierarchies is crucial for
performance and energy efficiency. Current processors rely on large shared Non-Uniform …

TD-NUCA: runtime driven management of NUCA caches in task dataflow programming models

P Caheny, L Alvarez, M Casas, M Moreto - Proceedings of the …, 2022 - dl.acm.org
In high performance processors, the design of on-chip memory hierarchies is crucial for
performance and energy efficiency. Current processors rely on large shared Non-Uniform …

TD-NUCA: Runtime Driven Management of NUCA Caches in Task Dataflow Programming Models

P Caheny, L Alvarez, M Casas… - … Conference for High …, 2022 - computer.org
In high performance processors, the design of on-chip memory hierarchies is crucial for
performance and energy efficiency. Current processors rely on large shared Non-Uniform …

TD-NUCA: Runtime Driven Management of NUCA Caches in Task Dataflow Programming Models

P Caheny, L Alvarez, M Casas… - … Conference for High …, 2022 - computer.org
In high performance processors, the design of on-chip memory hierarchies is crucial for
performance and energy efficiency. Current processors rely on large shared Non-Uniform …