Brloop: Constructing balanced retimed loop to architect stt-ram-based hybrid cache for vliw processors

K Qiu, Y Zhu, Y Xu, Q Huo, CJ Xue - Microelectronics Journal, 2019 - Elsevier
The new emerging non-volatile memory technology of Spin Torque Transfer RAM (STT-
RAM) has been proposed as a replacement for SRAM based cache. Recently its commercial …
被引用次数：3 相关文章

BRLoop: Constructing balanced retimed loop to architect STT-RAM-based hybrid cache for VLIW processors

K Qiu, Y Zhu, Y Xu, Q Huo, CJ Xue - Microelectronics Journal, 2019 - scholars.cityu.edu.hk
The new emerging non-volatile memory technology of Spin Torque Transfer RAM (STT-
RAM) has been proposed as a replacement for SRAM based cache. Recently its commercial …