A novel high performance and energy efficient NUCA architecture for STT-MRAM LLCs with thermal consideration

B Wu, P Dai, Y Cheng, Y Wang, J Yang… - … on Computer-Aided …, 2019 - ieeexplore.ieee.org
As the speed gap of the modern processor and the off-chip main memory enlarges, on-chip
cache capacity increases to sustain the performance scaling. As a result, the cache power …

[PDF][PDF] A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs with Thermal Consideration

B Wu, P Dai, Y Cheng, Y Wang, W Zhao - researchgate.net
As the speed gap of the modern processor and the off-chip main memory enlarges, on-chip
cache capacity increases to sustain the performance scaling. As a result, the cache power …