A 28GHz self-contained power amplifier for 5G applications in 28nm FD-SOI CMOS

B Moret, V Knopik, E Kerherve - 2017 IEEE 8th Latin American …, 2017 - ieeexplore.ieee.org
This paper presents a 28 GHz CMOS balanced Power Amplifier (PA) with integrated
quadrature hybrid couplers to achieve robust load insensitivity for 5G phased array …

A 19-43 GHz linear power amplifier in 28nm bulk CMOS for 5G phased array

MMR Esmael, MAY Abdalla… - 2019 IEEE Topical …, 2019 - ieeexplore.ieee.org
This paper presents a linear power amplifier (PA) implemented in 28-nm bulk CMOS
process for 5G communication systems with wideband operation in order to cover all …

A highly efficient and linear power amplifier for 28-GHz 5G phased array radios in 28-nm CMOS

S Shakib, HC Park, J Dunworth… - IEEE Journal of Solid …, 2016 - ieeexplore.ieee.org
This paper presents the first linear bulk CMOS power amplifier (PA) targeting low-power fifth-
generation (5G) mobile user equipment integrated phased array transceivers. The output …

A 29-to-57GHz AM-PM compensated class-AB power amplifier for 5G phased arrays in 0.9 V 28nm bulk CMOS

M Vigilante, P Reynaert - 2017 IEEE Radio Frequency …, 2017 - ieeexplore.ieee.org
This paper presents a 29-to-57GHz (65% BW) AM-PM compensated class-AB power
amplifier tailored for 5G phased arrays. Designed in 0.9 V 28nm CMOS without RF thick top …

A 24-31GHz 28nm FD-SOI CMOS Balanced Power Amplifier Robust to 3: 1 VSWR for 5G Application

G Diverrez, E Kerhervé… - 2022 52nd European …, 2022 - ieeexplore.ieee.org
This paper presents a broadband balanced power amplifier (PA) for 5G mm-wave
applications. Thanks to its balanced architecture, the PA exhibits a great robustness to active …

A 31 GHz 2-Stage Reconfigurable Balanced Power Amplifier with 32.6dB Power Gain, 25.5% PAEmax and 17.9dBm Psatin 28nm FD-SOI CMOS

F Torres, M De Matos, A Cathelin… - 2018 IEEE Radio …, 2018 - ieeexplore.ieee.org
In this paper, a 31GHz reconfigurable balanced 2-stage power amplifier (PA) integrated in
28nm FD-SOI CMOS technology is demonstrated aiming for SoC implementation. Fine grain …

A 19.1% PAE, 22.4-dBm 53-GHz parallel power combining power amplifier with stacked-FET techniques in 90-nm CMOS

WC Sun, CN Kuo - 2019 IEEE MTT-S International Microwave …, 2019 - ieeexplore.ieee.org
A two-stage fully integrated 53-GHz stacked-FET power amplifier (PA) is implemented in 90-
nm bulk CMOS. The output stage is optimized to achieve high output power while …

A 27 GHz adaptive bias variable gain power amplifier and T/R switch in 22nm FD-SOI CMOS for 5G antenna arrays

C Elgaard, S Andersson, P Caputa… - 2019 IEEE Radio …, 2019 - ieeexplore.ieee.org
A 27 GHz fully integrated, variable gain, two stage Power Amplifier (PA) and a
Transmit/Receive (T/R) switch targeting 5G antenna array systems are presented. The PA …

A 28-GHz highly efficient CMOS power amplifier using a compact symmetrical 8-way parallel-parallel power combiner with IMD3 cancellation method

H Ahn, I Nam, O Lee - 2020 IEEE Radio Frequency Integrated …, 2020 - ieeexplore.ieee.org
This paper presents a linear CMOS power amplifier (PA) for mm-wave 5G applications. A
compact 8-way parallel-parallel power combiner is proposed to increase Pout with low loss …

A fully integrated dual-mode highly linear 2.4 GHz CMOS power amplifier for 4G WiMax applications

D Chowdhury, CD Hull, OB Degani… - IEEE Journal of Solid …, 2009 - ieeexplore.ieee.org
In recent years, there has been tremendous interest in trying to implement the power
amplifier in CMOS, due to its cost and integration benefits. Most of the high power (watt …