POSH: a TLS compiler that exploits program structure

W Liu, J Tuck, L Ceze, W Ahn, K Strauss… - Proceedings of the …, 2006 - dl.acm.org
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better
understood, it is important to focus on TLS compilation. TLS compilers are interesting in that …

Exposing speculative thread parallelism in SPEC2000

MK Prabhu, K Olukotun - Proceedings of the tenth ACM SIGPLAN …, 2005 - dl.acm.org
As increasing the performance of single-threaded processors becomes increasingly difficult,
consumer desktop processors are moving toward multi-core designs. One way to enhance …

[PDF][PDF] Software and hardware for exploiting speculative parallelism with a multiprocessor

J Oplinger, D Heine, SW Liao, BA Nayfeh, MS Lam… - 1997 - infolab.stanford.edu
Thread-level speculation (TLS) makes it possible to parallelize general purpose C
programs. This paper proposes software and hardware mechanisms that support …

Tasking with out-of-order spawn in TLS chip multiprocessors: Microarchitecture and compilation

J Renau, J Tuck, W Liu, L Ceze, K Strauss… - Proceedings of the 19th …, 2005 - dl.acm.org
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support
Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must …

Using thread-level speculation to simplify manual parallelization

MK Prabhu, K Olukotun - Proceedings of the ninth ACM SIGPLAN …, 2003 - dl.acm.org
In this paper, we provide examples of how thread-level speculation (TLS) simplifies manual
parallelization and enhances its performance. A number of techniques for manual …

Compiler-driven dependence profiling to guide program parallelization

P Wu, A Kejariwal, C Caşcaval - … , LCPC 2008, Edmonton, Canada, July 31 …, 2008 - Springer
As hardware systems move toward multicore and multithreaded architectures, programmers
increasingly rely on automated tools to help with both the parallelization of legacy codes and …

Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices

CG Quiñones, C Madriles, J Sánchez, P Marcuello… - ACM Sigplan …, 2005 - dl.acm.org
Speculative parallelization can provide significant sources of additional thread-level
parallelism, especially for irregular applications that are hard to parallelize by conventional …

Speculative parallelization using software multi-threaded transactions

A Raman, H Kim, TR Mason, TB Jablin… - Proceedings of the …, 2010 - dl.acm.org
With the right techniques, multicore architectures may be able to continue the exponential
performance trend that elevated the performance of applications of all types for decades …

SUIF: An infrastructure for research on parallelizing and optimizing compilers

RP Wilson, RS French, CS Wilson… - ACM Sigplan …, 1994 - dl.acm.org
Compiler infrastructures that support experimental research are crucial to the advancement
of high-performance computing. New compiler technology must be implemented and …

The STAMPede approach to thread-level speculation

JG Steffan, C Colohan, A Zhai, TC Mowry - ACM Transactions on …, 2005 - dl.acm.org
Multithreaded processor architectures are becoming increasingly commonplace: many
current and upcoming designs support chip multiprocessing, simultaneous multithreading …