A full adder circuit is considered as one of the basic building blocks of Digital Signal
Processors (DSPs), Arithmetic and Logic Units (ALUs), Application Specific Integrated …

In this paper, the low power and high performance full adder using 11 transistors has been
proposed. The GDI (gate diffusion input) technique has been used for simultaneous …

In this paper, we present a novel design for realize full adder circuit. Our approach based on
XOR-XNOR design full adder circuits in a single unit. Objective of this work is to investigate …

This paper presents a high drivability of full adder with less area and power consumption.
This GDI based full adder is implemented by using both gate diffusion input (GDI) technique …

A fast and power-efficient full Adder plays key role in electronics trade especially performing
arithmetic operations in microprocessors, digital signal processing (DSP) and image …

This paper presents an area efficient, high-speed and ultra low power 1-bit full adder that
uses only 9 transistors. It works based on majority function and MOS capacitors. Because of …

The main objective of this paper is to design the low power consumption and less area
occupied combinational circuit here we designed half adder circuit using three different logic …

In this paper, two high performance full adder circuits are proposed. We simulated these two
full adder circuits using Cadence VIRTUOSO environment in 0.18 µm UMC CMOS …

In this Paper, a CMOS Full Adder is designed using Tanner EDA Tool based on 0.25 µm
CMOS Technology. Using Tanner software tools, schematic and layout simulations as well …

Two new low-power, and high-performance 1-bit Full Adder cells are proposed in this paper.
These cells are based on low-power XOR/XNOR circuit and Majority-not gate. Majority-not …