Optical coupling techniques and configurations between dies

MJ Kobrinsky, JH Tseng, BA Block - US Patent App. 13/997,635, 2013 - Google Patents
BACKGROUND 0002 Optical signals may be used to communicate infor mation between
integrated circuits (ICs) such as ICs formed on different dies. Present techniques to optically …

Waveguide integration on laser for alignment-tolerant assembly

JH Tseng, PL Chang, MR Reshotko, I Ban… - US Patent …, 2014 - Google Patents
BACKGROUND Optical signals may be used to communicate information between
integrated circuits (ICs) such as ICs formed on dif ferent dies. Present techniques to optically …

Heterogeneous Technology Integration

J Kim, EP Gousev, MM Nowak - US Patent App. 12/731,520, 2011 - Google Patents
BACKGROUND 0002 Integrated circuits can be designed using different technologies, for
example complementary metal oxide semi conductor (CMOS) technology, glass technology …

Integration of electronic elements on the backside of a semiconductor die

V Ramachandran, U Ray - US Patent App. 14/499,151, 2016 - Google Patents
BACKGROUND 0002 Advances in the design and manufacture of semi conductor devices
have led to shrinking sizes of semiconduc torpackages, wafers, and dies/chips. As …

Interconnect structures

CE Uzoh, GG Fountain Jr, JA Theil - US Patent 11,158,573, 2021 - Google Patents
Representative techniques and devices, including process steps may be employed to
mitigate undesired dishing in conductive interconnect structures and erosion of dielectric …

Conductive pad structure for hybrid bonding and methods of forming same

SC Chen, SP Chou, YC Chu, CH Chou… - US Patent …, 2016 - Google Patents
BACKGROUND Typically, in a semiconductor device, various electronic components (eg,
transistors, diodes, resistors, capacitors, and the like) are formed in device dies on a wafer …

Optical receiver architecture using a mirrored substrate

J Heck, A Liu, MJ Paniccia - US Patent App. 12/825,257, 2011 - Google Patents
Techniques and architectures for providing a reflective target area of an integrated circuit die
assembly. In an embodiment, a reflective bevel surface of a die allows an optical signal to be …

Processing stacked substrates

CE Uzoh, G Gao - US Patent 10,707,087, 2020 - Google Patents
Representative implementations provide techniques for processing integrated circuit (IC)
dies and related devices, in preparation for stacking and bonding the devices. The disclosed …

Stacked packaging using reconstituted wafers

KK Hu, SZ Zhao, RR Khan, P Vorenkamp… - US Patent …, 2016 - Google Patents
BACKGROUND Packaging for dies that include, for example, at least one integrated circuit
(IC), is continually trending towards reduced package size with increased package density …

Techniques and configurations for recessed semiconductor substrates

A Wu, R Chen, CC Han, SM Liou, CC Wei… - US Patent App. 13 …, 2011 - Google Patents
BACKGROUND 0003. The background description provided herein is for the purpose of
generally presenting the context of the disclo sure. Work of the presently named inventors, to …