[PDF][PDF] Hardware context-switch methodology for dynamically partially reconfigurable systems

TY Lee, CC Hu, LW Lai, CC Tsai - Journal of Information Science and …, 2010 - Citeseer
Nowadays, the hardware of field programmable gate arrays (FPGAs) can be reconfigured
both dynamically and partially. A dynamically and partially reconfigurable system can share …

Analysis of FPGA-Based reconfiguration methods for mobile and embedded applications

DG Perera - Proceedings of the 12th FPGAworld Conference 2015, 2015 - dl.acm.org
As mobile and handheld devices are gaining popularity, many applications have found their
way into these devices. Apart from optimized hardware-software architectures, new …

An effective framework to evaluate dynamic partial reconfiguration in FPGA systems

K Papadimitriou, A Anyfantis… - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
The most popular representative devices of reconfigurable computing are field-
programmable gate arrays (FPGAs). A promising feature of an FPGA is the ability to reuse …

Multiple-clone configuration of relocatable partial bitstreams in Xilinx Virtex FPGAs

A Ebrahim, K Benkrid, X Iturbe… - 2013 NASA/ESA …, 2013 - ieeexplore.ieee.org
This paper addresses the high-performance systems which are based on swapping
relocatable partial bitstreams (also called hardware tasks) in and out of an FPGA device …

HTR: on-chip hardware task relocation for partially reconfigurable FPGAs

A Morales-Villanueva, A Gordon-Ross - International Symposium on …, 2013 - Springer
Partial reconfiguration (PR) enables shared FPGA systems to nonintrusively time multiplex
hardware tasks in partially reconfigurable regions (PRRs). To fully exploit PR, higher priority …

Partial reconfiguration on FPGAs in practice—Tools and applications

D Koch, J Torresen, C Beckhoff, D Ziener… - ARCS …, 2012 - ieeexplore.ieee.org
Run-time reconfiguration of FPGAs has been around in academia for more than two
decades but it is still applied very seldom in industrial applications. This has two main …

A design methodology for mobile and embedded applications on FPGA-based dynamic reconfigurable hardware

DG Perera, KF Li - International Journal of Embedded …, 2019 - inderscienceonline.com
With the proliferation of mobile/embedded devices, multiple running applications are
becoming a necessity on these devices. Thus, state-of-the-art techniques are needed to …

Parallelizing hardware tasks on multicontext FPGA with efficient placement and scheduling algorithms

H Liang, S Sinha, W Zhang - IEEE Transactions on Computer …, 2017 - ieeexplore.ieee.org
Field programmable gate arrays (FPGAs) are often used to accelerate multiple tasks
simultaneously, working in a tightly coupled processor-coprocessor architecture. Recently …

Performance of partial reconfiguration in FPGA systems: A survey and a cost model

K Papadimitriou, A Dollas, S Hauck - ACM Transactions on …, 2011 - dl.acm.org
Fine-grain reconfigurable devices suffer from the time needed to load the configuration
bitstream. Even for small bitstreams in partially reconfigurable FPGAs this time cannot be …

On-chip context save and restore of hardware tasks on partially reconfigurable FPGAs

A Morales-Villanueva… - 2013 IEEE 21st Annual …, 2013 - ieeexplore.ieee.org
Partial reconfiguration (PR) of field-programmable gate arrays (FPGAs) enables hardware
tasks to time multiplex PR regions (PRRs) by isolating reconfiguration to only the …