Using trio: juniper networks' programmable chipset-for emerging in-network applications

M Yang, A Baban, V Kugel, J Libby, S Mackie… - Proceedings of the …, 2022 - dl.acm.org
This paper describes Trio, a programmable chipset used in Juniper Networks' MX-series
routers and switches. Trio's architecture is based on a multi-threaded programmable packet …

Rapid service creation using the JUNOS SDK

J Kelly, W Araujo, K Banerjee - Proceedings of the 2nd ACM SIGCOMM …, 2009 - dl.acm.org
The creation of services on IP networks is a lengthy process. The development time is further
increased if this involves the equipment manufacturer adding third-party technology in their …

A pipelined memory architecture for high throughput network processors

T Sherwood, G Varghese, B Calder - ACM SIGARCH Computer …, 2003 - dl.acm.org
Designing ASICs for each new generation of backbone routers is a time intensive and
fiscally draining process. In this paper we focus on the design of a programmable …

Gauntlet: Finding bugs in compilers for programmable packet processing

F Ruffy, T Wang, A Sivaraman - 14th USENIX Symposium on Operating …, 2020 - usenix.org
Programmable packet-processing devices such as programmable switches and network
interface cards are becoming mainstream. These devices are configured in a domain …

PacketMill: toward per-Core 100-Gbps networking

A Farshin, T Barbette, A Roozbeh… - Proceedings of the 26th …, 2021 - dl.acm.org
We present PacketMill, a system for optimizing software packet processing, which (i)
introduces a new model to efficiently manage packet metadata and (ii) employs code …

{PANIC}: A {High-Performance} programmable {NIC} for multi-tenant networks

J Lin, K Patel, BE Stephens, A Sivaraman… - … USENIX Symposium on …, 2020 - usenix.org
Programmable NICs have diverse uses, and there is need for a NIC platform that can offload
computation from multiple co-resident applications to many different types of substrates …

Smartnic performance isolation with fairnic: Programmable networking for the cloud

S Grant, A Yelam, M Bland, AC Snoeren - Proceedings of the Annual …, 2020 - dl.acm.org
Multiple vendors have recently released SmartNICs that provide both special-purpose
accelerators and programmable processing cores that allow increasingly sophisticated …

P2GO: P4 profile-guided optimizations

P Wintermeyer, M Apostolaki, A Dietmüller… - Proceedings of the 19th …, 2020 - dl.acm.org
Programmable devices allow the operator to specify the data-plane behavior of a network
device in a high-level language such as P4. The compiler then maps the P4 program to the …

Can software routers scale?

K Argyraki, S Baset, BG Chun, K Fall… - Proceedings of the …, 2008 - dl.acm.org
Software routers can lead us from a network of special-purpose hardware routers to one of
general-purpose extensible infrastructure-if, that is, they can scale to high speeds. We …

Chimpp: A click-based programming and simulation environment for reconfigurable networking hardware

E Rubow, R McGeer, J Mogul, A Vahdat - Proceedings of the 6th ACM …, 2010 - dl.acm.org
Reconfigurable network hardware makes it easier to experiment with and prototype high-
speed networking systems. However, these devices are still relatively hard to program; for …