In this paper, a frequency synthesizer, based on a type-2, third order phase locked loop
(PLL), covering the frequency range of 0.9–5.4 GHz using three voltage controlled …

SUMMARY A frequency synthesizer with low‐power and very short settling time is
introduced, which utilizes two‐point channel control paths. While the main‐path is the same …

The article presents the design of a high-speed clock signal generation circuit which is
capable of delivering high-speed clock signals at 8GHz and 32GHz. A two-stage …

This paper presents the design and verification of a proposed 30-GHz power-efficient phase-
locked loop (PLL) frequency synthesizer for 60-GHz applications. Fabricated by a …

The adoption of dynamic dividers in CMOS phase-locked loops for multigigahertz
applications allows to reduce the power consumption substantially without impairing the …

This paper investigates a novel approach to implementation of multiband frequency
synthesizer for cognitive multi-radio applications. The architecture here considered employs …

A 40-GHz phase-locked loop (PLL) frequency synthesizer for 60-GHz wireless
communication applications is presented. The electrical characteristics of the passive …

We present an integrated frequency synthesizer which is able to provide in-
phase/quadrature phase signal over the frequency bands 0.6-4.6 GHz, 5-7 GHz, 10-14 GHz …

This paper presents a dual-mode PLL synthesizer used in 60 GHz transceiver supporting
both IEEE 802.11 ad and IEEE 802.15. 3c standards with low power consumption and low …

A fully integrated 5-GHz phase-locked loop (PLL) based frequency synthesizer is designed
in a 0.24/spl mu/m CMOS technology. The power consumption of the synthesizer is …