Energy-efficient convolution architecture based on rescheduled dataflow

J Jo, S Kim, IC Park - … Transactions on Circuits and Systems I …, 2018 - ieeexplore.ieee.org
This paper presents a rescheduled dataflow of convolution and its hardware architecture
that can enhance energy efficiency. For convolution involving a large amount of …

Efficient fast convolution architectures for convolutional neural network

W Xu, Z Wang, X You, C Zhang - 2017 IEEE 12th International …, 2017 - ieeexplore.ieee.org
Due to the world-wide interests on artificial intelligence, many acceleration architectures for
convolutional neural network (CNN) have been proposed recently. However, few of them …

Efficient accelerator for dilated and transposed convolution with decomposition

KW Chang, TS Chang - 2020 IEEE International Symposium on …, 2020 - ieeexplore.ieee.org
Hardware acceleration for dilated and transposed convolution enables real time execution
of related tasks like segmentation, but current designs are specific for these convolutional …

Low cost convolutional neural network accelerator based on bi-directional filtering and bit-width reduction

W Choi, K Choi, J Park - IEEE Access, 2018 - ieeexplore.ieee.org
This paper presents a low-area and energy-efficient hardware accelerator for the
convolutional neural networks (CNNs). Based on the multiply-accumulate-based …

[HTML][HTML] Convolution accelerator designs using fast algorithms

Y Zhao, D Wang, L Wang - Algorithms, 2019 - mdpi.com
Convolutional neural networks (CNNs) have achieved great success in image processing.
However, the heavy computational burden it imposes makes it difficult for use in embedded …

Improving memory utilization in convolutional neural network accelerators

P Jokic, S Emery, L Benini - IEEE Embedded Systems Letters, 2020 - ieeexplore.ieee.org
While the accuracy of convolutional neural networks (CNNs) has achieved vast
improvements by introducing larger and deeper network architectures, also the memory …

Efficient hardware architectures for deep convolutional neural network

J Wang, J Lin, Z Wang - … Transactions on Circuits and Systems I …, 2017 - ieeexplore.ieee.org
Convolutional neural network (CNN) is the state-of-the-art deep learning approach
employed in various applications. Real-time CNN implementations in resource limited …

An efficient fpga-based depthwise separable convolutional neural network accelerator with hardware pruning

Z Liu, Q Liu, S Yan, RCC Cheung - ACM Transactions on Reconfigurable …, 2024 - dl.acm.org
Convolutional neural networks (CNNs) have been widely deployed in computer vision tasks.
However, the computation and resource intensive characteristics of CNN bring obstacles to …

A resource-limited hardware accelerator for convolutional neural networks in embedded vision applications

S Moini, B Alizadeh, M Emad… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
In this brief, we introduce an architecture for accelerating convolution stages in convolutional
neural networks (CNNs) implemented in embedded vision systems. The purpose of the …

[HTML][HTML] Design of flexible hardware accelerators for image convolutions and transposed convolutions

C Sestito, F Spagnolo, S Perri - Journal of Imaging, 2021 - mdpi.com
Nowadays, computer vision relies heavily on convolutional neural networks (CNNs) to
perform complex and accurate tasks. Among them, super-resolution CNNs represent a …