An improved non-local awareness of congestion and load balanced algorithm for the communication of on chip 2D mesh-based network

M Ahmed, M Iram Baig - Mehran University Research Journal Of …, 2023 - search.informit.org
Due to advancements in multi-core design technology, IC (Integrated Circuits) designers
have expanded the single chip multi-core design. A privileged way of communication …

A novel heterogeneous congestion criterion for mesh-based networks-on-chip

R Akbar, F Safaei - Microprocessors and Microsystems, 2021 - Elsevier
In recent years, congestion in Networks-on-chip (NoC) has emerged as an important
research topic due to the increasing number of processing cores. To solve the congestion …

Low Latency Path Prediction Mechanism in 2D-NoC

M Rezaei-Ravari… - … Engineering (ICEE), Iranian …, 2018 - ieeexplore.ieee.org
Network-on-Chip (NoC) has an efficient on-chip communication solution for Chip Multi-
Processors (CMPs) in order to overcome traditional bus connections. One of the …

A novel congestion-aware and adaptive routing algorithm in mesh-based networks-on-chip with segmentation

R Akbar, F Safaei - 2017 19th International Symposium on …, 2017 - ieeexplore.ieee.org
The networks on chip (NoC) have been presented as a viable and scalable solution for
connecting the processor cores in a multi-core chip. In recent years, with increasing the …

A new congestion-aware routing algorithm in network-on-chip: 2D and 3D comparison

K Gaffour, MK Benhaoua, AH Benyamina… - International Journal of …, 2023 - Taylor & Francis
Network on-Chip (NoC) is scalable, flexible, modular communication structure for Multi/Many-
core architectures. It allows simpler interconnect models with higher bandwidth compared to …

Low‐cost regional‐based congestion‐aware routing algorithm for 2D mesh NoC

S Vazifedunn, A Reza… - International Journal of …, 2023 - Wiley Online Library
Given the advantages of network‐on‐chips (NoCs), they are rapidly improving to replace
other forms of System‐on‐Chip (SoC) designs. Although various factors improve the NoC's …

CARM: congestion adaptive routing method for on chip networks

M Kumar, V Laxmi, MS Gaur, SB Ko… - … Conference on VLSI …, 2014 - ieeexplore.ieee.org
Network-on-Chip (NoC) has emerged as a long-term and efficient on-chip communication
solution for MCSoC and CMP micro-architectures to overcome bottleneck of traditional bus …

[PDF][PDF] Performance of diagonal mesh network on chip using NS2

PP Papalkar, MA Gaikwad - International Journal of Computer …, 2018 - researchgate.net
Accepted: 18/Aug/2018, Published: 30/Sept./2018 Abstract—Network on Chip (NoC) is an
interconnection network, which provides a network architecture to overcome limitations of …

σnLBDR: generic congestion handling routing implementation for two‐dimensional mesh network‐on‐chip

N Gupta, A Sharma, V Laxmi, MS Gaur… - IET Computers & …, 2016 - Wiley Online Library
The number of cores on a chip is increasing from a few cores to thousands. However, the
communication mechanisms for these systems do not scale at the same pace, leading to …

Simple Oblivious Routing Method to Balance Load in Network-on-Chip

J Guan, J Cai, R Xie, Y Wang, J Lai - IEICE TRANSACTIONS on …, 2021 - search.ieice.org
This letter presents an oblivious and load-balanced routing (OLBR) method without virtual
channels for 2D mesh Network-on-chip (NoC). To balance the traffic load of network and …