Computedram: In-memory compute using off-the-shelf drams

F Gao, G Tziantzioulis, D Wentzlaff - … of the 52nd annual IEEE/ACM …, 2019 - dl.acm.org
In-memory computing has long been promised as a solution to the" Memory Wall" problem.
Recent work has proposed using chargesharing on the bit-lines of a memory in order to …

Rethinking DRAM design and organization for energy-constrained multi-cores

AN Udipi, N Muralimanohar, N Chatterjee… - Proceedings of the 37th …, 2010 - dl.acm.org
DRAM vendors have traditionally optimized the cost-per-bit metric, often making design
decisions that incur energy penalties. A prime example is the overfetch feature in DRAM …

Enabling the adoption of processing-in-memory: Challenges, mechanisms, future research directions

S Ghose, K Hsieh, A Boroumand… - arXiv preprint arXiv …, 2018 - arxiv.org
Poor DRAM technology scaling over the course of many years has caused DRAM-based
main memory to increasingly become a larger system bottleneck. A major reason for the …

Crow: A low-cost substrate for improving dram performance, energy efficiency, and reliability

H Hassan, M Patel, JS Kim, AG Yaglikci… - Proceedings of the 46th …, 2019 - dl.acm.org
DRAM has been the dominant technology for architecting main memory for decades. Recent
trends in multi-core system design and large-dataset applications have amplified the role of …

A performance comparison of contemporary DRAM architectures

V Cuppu, B Jacob, B Davis, T Mudge - Proceedings of the 26th annual …, 1999 - dl.acm.org
In response to the growing gap between memory access time and processor speed, DRAM
manufacturers have created several new DRAM architectures. This paper presents a …

PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM

A Olgun, JG Luna, K Kanellopoulos, B Salami… - ACM Transactions on …, 2022 - dl.acm.org
Commodity DRAM-based processing-using-memory (PuM) techniques that are supported
by off-the-shelf DRAM chips present an opportunity for alleviating the data movement …

Retention-aware placement in DRAM (RAPID): Software methods for quasi-non-volatile DRAM

RK Venkatesan, S Herr… - The Twelfth International …, 2006 - ieeexplore.ieee.org
Measurements of an off-the-shelf DRAM chip confirm that different cells retain information for
different amounts of time. This result extends to DRAM rows, or pages (retention time of a …

SoftMC: A flexible and practical open-source infrastructure for enabling experimental DRAM studies

H Hassan, N Vijaykumar, S Khan… - … Symposium on High …, 2017 - ieeexplore.ieee.org
DRAM is the primary technology used for main memory in modern systems. Unfortunately,
as DRAM scales down to smaller technology nodes, it faces key challenges in both data …

RowClone: Fast and energy-efficient in-DRAM bulk data copy and initialization

V Seshadri, Y Kim, C Fallin, D Lee… - Proceedings of the 46th …, 2013 - dl.acm.org
Several system-level operations trigger bulk data copy or initialization. Even though these
bulk data operations do not require any computation, current systems transfer a large …

Mini-rank: Adaptive DRAM architecture for improving memory power efficiency

H Zheng, J Lin, Z Zhang, E Gorbatov… - 2008 41st IEEE/ACM …, 2008 - ieeexplore.ieee.org
The widespread use of multicore processors has dramatically increased the demand on
high memory bandwidth and large memory capacity. As DRAM subsystem designs stretch to …