[PDF][PDF] Performance analysis of magnitude comparator using different design techniques

M Aggarwal, R Mehra - International Journal of Computer …, 2015 - researchgate.net
Comparators are a basic design module and element in modern digital VLSI design, digital
signal processors and data processing application-specific integrated circuits. This paper …

[PDF][PDF] A Novel Design of Hybrid 2 Bit Magnitude Comparator

MM Das, G Mohan, AK Greeshma - International Research Journal …, 2019 - academia.edu
With the increasing demand of IoT and portable devices which are battery operated, low
power designs are very essential. Comparator is the most fundamental component that …

[PDF][PDF] A low power 8-bit magnitude comparator with small transistor count using hybrid ptl/cmos logic

G Sharma, U Nirmal, Y Misra - IJCEM International Journal of …, 2011 - researchgate.net
Magnitude comparison is one of the basic functions used for sorting in microprocessor,
digital signal processing, so a high performance, effective magnitude comparator is …

2-Bit magnitude comparator using GDI technique

V Shekhawat, T Sharma… - … Conference on Recent …, 2014 - ieeexplore.ieee.org
In recent years, low power design has become one of the prime focuses for the digital VLSI
circuit. Keeping the same in mind a new design of 2-Bit GDI based Magnitude Comparator …

[PDF][PDF] 2-bit magnitude comparator design using different logic styles

SA Anjuli, A Satjajit - International Journal of Engineering Science …, 2013 - idc-online.com
2-bit magnitude comparator design using different logic styles is proposed in this brief.
Comparison is most basic arithmetic operation that determines if one number is greater than …

[PDF][PDF] Low power magnitude comparator circuit design

V Shekhawat, T Sharma, KG Sharma - International Journal of …, 2014 - academia.edu
This paper presents a new low power 2-Bit magnitude comparator using full adder
technique. The proposed magnitude comparator (PTL logic) has been compared with …

Comparative analysis of a 2-bit magnitude comparator using various high performance techniques

G Sharma, H Arora, J Chawla… - … on Communications and …, 2015 - ieeexplore.ieee.org
This brief summarizes the comparative analysis of a 2 bit Magnitude Comparator using
different techniques. A comparator forms a fundamental element which is used in the …

[PDF][PDF] Design and Analysis of Low Power 2-bit and 4-bit Digital Comparators in 45nm and 90nm CMOS Technologies

SR Agrakshi - Int. J. Engg Tech. Res. ISSN - academia.edu
Digital Comparator is an important part of ALU for comparison operations. With the
miniaturization of technology, it becomes essential for any device to be power efficient. In the …

Design of Energy Efficient Magnitude Comparator Architecture using 8T XOR Gate

SS Naik, PI Basarkod - 2022 3rd International Conference on …, 2022 - ieeexplore.ieee.org
This paper proposes a CMOS comparator circuitry with a three-stage topology for a high-
speed Analog-to-Digital Converter (ADC). The speed of ADC is limited by the used …

Design and analysis of low power, high speed 4-bit magnitude comparator

P Singh, PK Jain - 2018 International Conference on Recent …, 2018 - ieeexplore.ieee.org
This paper illustrates the design of low power, high speed 4 Bit Magnitude Comparator. The
NOR gate logic used in this paper to design the proposed circuit can help in designing of …