The influence of the SiN cap-layer deposition process including different pre-clean
treatments on the electromigration (EM) and stressvoiding (SV) behavior of copper dual …

In this investigation, Cu/dielectric-cap interface and Cu/cap/liner edge were studied in detail
to identify the dominant path in electromigration stressed via-fed test structures that …

The electromigration (EM) and bias temperature stress (BTS) performances of Cu
metallization in dual damascene structure were examined. The experimental results show …

In highly integrated semiconductor devices the time to failure of copper interconnects
strongly depends on the properties of the copper-dielectric cap interface. In this work a …

Thermal treatments of electroplated copper films before CMP can increase grain size and
therefore reduce resistance and improve electromigration reliability. However, high …

Low electromigration in Cu interconnect lines represents one of the major challenges for a
good performance of semiconductor devices. Referring to this, experiments were carried out …

Electromigration in dual damascene copper interconnects was investigated using package
level electromigration tests and failure analysis techniques. Interface diffusion along …

Sub-micron Cu damascene interconnect, electromigration is mainly due to the diffusion at
the interfaces of Cu with liner or dielectric capping layer. Many reports have pointed out the …

A significant improvement in electromigration performance for copper dual damascene
structures was observed with the use of Pulsed Deposition Layer (PDL) TiN (Si) as a copper …

Suppressing Cu diffusion along the Cu/Cap interface has proven to be one of the most
effective ways to enhance the electromigration (EM) resistance of advanced Cu …