AS Sichani, WA Moreno - 2018 IEEE 9th Latin American …, 2018 - ieeexplore.ieee.org
Side channel information is a major threat against cryptographic circuits. Since cryptographic algorithms are implemented on microprocessors or custom hardware, the …
D Vikas - Int. J. Res. Eng. Technol, 2014 - academia.edu
This paper presents different techniques for reducing glitch power in digital circuits. The aim of this study is to minimize glitch power as glitch power comes under dynamic power, so that …
M Slimani, P Matherat - 2011 Faible Tension Faible …, 2011 - ieeexplore.ieee.org
We address the problem of circuit-level design for low power. We describe a new method for glitch power reduction based on threshold voltage adjustment. The proposed method …
H Mohammadian, MB Tavakolib, F Setoudeh, A Horri - Integration, 2021 - Elsevier
By the reduction in the size of transistors and the development of submicron technology, as well as the construction of more integrated circuits on chips, leakage power has become one …
D Helms, W Nebel - 2007 14th IEEE International Conference …, 2007 - ieeexplore.ieee.org
In sub-100 nm technologies, leakage related problems are based on the standby current's exponential dependency on both, parameter scaling and parameter variation …
A Arthurs, J Roark, J Di - International Journal of VLSI Design & …, 2012 - academia.edu
Ultra-low voltage digital circuit design is an active research area, especially for portable applications such as wearable electronics, intelligent remote sensors, implantable medical …
Y Nishio, A Kobayashi, K Niitsu - IEICE Transactions on Electronics, 2019 - search.ieice.org
This study proposes a design and calibration method for a small-footprint, low-frequency, and low-power gate leakage timer using a differential leakage technique for IoT …
P Bikki, P Karuppanan - 2017 4th International Conference on …, 2017 - ieeexplore.ieee.org
In this article, novel leakage control techniques are adopted in Feed-Through Logic (FTL) for low power high-speed designs. The FTL design has a unique feature; the outputs are …
W Rim, W Choi, J Park - … on Circuits and Systems II: Express …, 2012 - ieeexplore.ieee.org
Subthreshold logic has become an attractive option in energy-constrained applications, where the key metric is energy consumption rather than operating speed or silicon area …