Variability in architectural simulations of multi-threaded workloads

AR Alameldeen, DA Wood - The Ninth International …, 2003 - ieeexplore.ieee.org
Multi-threaded commercial workloads implement many important Internet services.
Consequently, these workloads are increasingly used to evaluate the performance of …

[PDF][PDF] Evaluating non-deterministic multi-threaded commercial workloads

AR Alameldeen, CJ Mauer, M Xu… - Proceedings of the …, 2002 - research.cs.wisc.edu
Full-system simulation is increasingly used to evaluate the performance of commercial
workloads on future multiprocessor designs. However, challenges such as simulation …

A co-phase matrix to guide simultaneous multithreading simulation

M Van Biesbrouck, T Sherwood… - … Symposium on-ISPASS …, 2004 - ieeexplore.ieee.org
Several commercial processors have architectures that include support for simultaneous
multithreading (SMT), yet there is still not a validated methodology for estimating the …

Sampled simulation of multi-threaded applications

TE Carlson, W Heirman… - 2013 IEEE International …, 2013 - ieeexplore.ieee.org
Sampling is a well-known workload reduction technique that allows one to speed up
architectural simulation while accurately predicting performance. Previous sampling …

Barrierpoint: Sampled simulation of multi-threaded applications

TE Carlson, W Heirman… - … Analysis of Systems …, 2014 - ieeexplore.ieee.org
Sampling is a well-known technique to speed up architectural simulation of long-running
workloads while maintaining accurate performance predictions. A number of sampling …

EXPERT: expedited simulation exploiting program behavior repetition

W Liu, MC Huang - Proceedings of the 18th annual international …, 2004 - dl.acm.org
Studying program behavior is a central component in architectural designs. In this paper, we
study and exploit one aspect of program behavior, the behavior repetition, to expedite …

Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation

TE Carlson, W Heirman, L Eeckhout - Proceedings of 2011 International …, 2011 - dl.acm.org
Two major trends in high-performance computing, namely, larger numbers of cores and the
growing size of on-chip cache memory, are creating significant challenges for evaluating the …

Full-system timing-first simulation

CJ Mauer, MD Hill, DA Wood - Proceedings of the 2002 ACM …, 2002 - dl.acm.org
Computer system designers often evaluate future design alternatives with detailed
simulators that strive for functional fidelity (to execute relevant workloads) and performance …

ESESC: A fast multicore simulator using time-based sampling

EK Ardestani, J Renau - 2013 IEEE 19th International …, 2013 - ieeexplore.ieee.org
Architects rely on simulation in their exploration of the design space. However, slow
simulation speed caps their productivity and limits the depth of their exploration. Sampling …

Interval simulation: Raising the level of abstraction in architectural simulation

D Genbrugge, S Eyerman… - HPCA-16 2010 The …, 2010 - ieeexplore.ieee.org
Detailed architectural simulators suffer from a long development cycle and extremely long
evaluation times. This longstanding problem is further exacerbated in the multi-core …