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LB Arimilli, RK Arimilli, R Rajamony - US Patent 7,793,158, 2010 - Google Patents
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LB Arimilli, RK Arimilli, R Rajamony - US Patent 7,769,891, 2010 - Google Patents
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System and method for handling indirect routing of information between supernodes of a multi-tiered full-graph interconnect architecture

LB Arimilli, RK Arimilli, R Rajamony - US Patent 7,769,892, 2010 - Google Patents
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Packet coalescing in virtual channels of a data processing system in a multi-tiered full-graph interconnect architecture

LB Arimilli, RK Arimilli, R Rajamony - US Patent 8,108,545, 2012 - Google Patents
(73) Assignee: International Business Machines(Continued) Corporation, Armonk, NY (US)
OTHER PUBLICATIONS (*) Notice: Subject to any disclaimer, the term of this US Appl. No. 1 …

Providing a fully non-blocking switch in a supernode of a multi-tiered full-graph interconnect architecture

LB Arimilli, RK Arimilli, R Rajamony - US Patent 8,014,387, 2011 - Google Patents
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Multi-protocol I/O interconnect time synchronization

PR Chandra, V Yudovich, E Galil, E Kugman - US Patent 8,953,644, 2015 - Google Patents
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