Fully depleted silicon on insulator devices CMOS: The 28-nm node is the perfect technology for analog, RF, mmW, and mixed-signal system-on-chip integration

A Cathelin - IEEE Solid-State Circuits Magazine, 2017 - ieeexplore.ieee.org
The race on the Complementary Metal-Oxide-Semiconductor (CMOS) More Moore
integration scale has brought to light several major limitations for efficient planar process …

Planar fully-depleted-silicon-on-insulator technologies: Toward the 28 nm node and beyond

B Doris, B DeSalvo, K Cheng, P Morin, M Vinet - Solid-State Electronics, 2016 - Elsevier
This paper presents a comprehensive overview of the research done in the last decade on
planar Fully-Depleted-Silicon-On-Insulator (FDSOI) technologies in the frame of the joint …

Fully depleted SOI process and device technology for digital and RF applications

F Ichikawa, Y Nagatomo, Y Katakura, M Itoh, S Itoh… - Solid-State …, 2004 - Elsevier
This work demonstrates suitability of FD-SOI devices for low power digital and RF
applications for wireless communication. FD-SOI CMOS offers an approximately 60% power …

[图书][B] CMOS VLSI engineering: silicon-on-insulator (SOI)

JB Kuo, KW Su - 1998 - books.google.com
Silicon-On-Insulator (SOI) CMOS technology has been regarded as another major
technology for VLSI in addition to bulk CMOS technology. Owing to the buried oxide …

[图书][B] Fully-depleted SOI CMOS circuits and technology

T Sakurai, A Matsuzawa, T Douseki - 2006 - Springer
The most important issue confronting CMOS technology is the power explosion of chips
arising from the scaling law. Bulk-Si devices are now running into a number of fundamental …

Fully-depleted SOI CMOS technology for low-voltage low-power mixed digital/analog/microwave circuits

D Flandre, JP Colinge, J Chen, D De Ceuster… - … Integrated Circuits and …, 1999 - Springer
This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers
unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well …

A 0.25-/spl mu/m, 600-MHz, 1.5-V, fully depleted SOI CMOS 64-bit microprocessor

SB Park, YW Kim, YG Ko, KI Kim, IK Kim… - IEEE Journal of Solid …, 1999 - ieeexplore.ieee.org
A 0.25-/spl mu/m, four-layer-metal, 1.5-V, 600-MHz, fully depleted (FD) silicon-on-insulator
(SOI) CMOS 64-bit ALPHA1 microprocessor integrating 9.66 million transistors on a 209 …

FDSOI devices with thin BOX and ground plane integration for 32 nm node and below

C Fenouillet-Beranger, S Denorme, P Perreau… - Solid-State …, 2009 - Elsevier
In this paper we compare Fully-Depleted SOI (FDSOI) devices with different BOX (Buried
Oxide) thicknesses with or without ground plane (GP). With a simple high-k/metal gate …

[图书][B] Fully depleted silicon-on-insulator: nanodevices, mechanisms and characterization

S Cristoloveanu - 2021 - books.google.com
Fully Depleted Silicon-On-Insulator provides an in-depth presentation of the fundamental
and pragmatic concepts of this increasingly important technology. There are two main …

SOI technologies for RF and millimeter-wave applications

M Rack, JP Raskin - Convergence of More Moore, More than …, 2021 - taylorfrancis.com
This chapter presents an overview of silicon-on-insulator (SOI) technology for radio-
frequency (RF) and millimeter-wave telecommunication applications. The SOI technology …