[图书][B] Through silicon vias: materials, models, design, and performance

BK Kaushik, VR Kumar, MK Majumder, A Alam - 2016 - taylorfrancis.com
Recent advances in semiconductor technology offer vertical interconnect access (via) that
extend through silicon, popularly known as through silicon via (TSV). This book provides a …

Modeling and fabrication aspects of Cu-and carbon nanotube-based through-silicon vias

T Goyal, MK Majumder, BK Kaushik - IETE Journal of Research, 2021 - Taylor & Francis
This paper discourses the variations in methods of fabrication and modeling of Through-
Silicon Vias (TSVs) in chronological order. Three-dimensional (3D) integration is an …

Development of carbon nanotube based through-silicon vias

BC Kim, S Kannan, A Gupta, F Mohammed, B Ahn - 2010 - asmedigitalcollection.asme.org
The design and development of reliable 3D integrated systems require high performance
interconnects, which in turn are largely dependent on the choice of filler materials used in …

Through-silicon vias: drivers, performance, and innovations

PA Thadesar, X Gu, R Alapati… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
To address the abating performance improvements from device scaling, innovative 2.5-D
and 3-D integrated circuits with vertical interconnects called through-silicon vias (TSVs) …

Carbon nanotube growth for through silicon via application

R Xie, C Zhang, MH Van der Veen, K Arstila… - …, 2013 - iopscience.iop.org
Through silicon via (TSV) technology is key for next generation three-dimensional integrated
circuits, and carbon nanotubes (CNT) provide a promising alternative to metal for filling the …

Vertically stacked carbon nanotube-based interconnects for through silicon via application

D Jiang, W Mu, S Chen, Y Fu… - IEEE Electron Device …, 2015 - ieeexplore.ieee.org
Stacking of silicon chips with carbon nanotube (CNT)-based through-silicon vias (TSVs) is
experimentally demonstrated. Polymer filling is used to improve the transfer quality of CNTs …

Overview and outlook of through‐silicon via (TSV) and 3D integrations

JH Lau - Microelectronics International, 2011 - emerald.com
Purpose–The purpose of this paper is to focus on through‐silicon via (TSV), with a new
concept that every chip or interposer could have two surfaces with circuits. Emphasis is …

Fabrication and electrical performance of through silicon via interconnects filled with a copper/carbon nanotube composite

Y Feng, SL Burkett - Journal of Vacuum Science & Technology B, 2015 - pubs.aip.org
In this work, through silicon vias (TSVs) were fabricated using a materials system consisting
of a composite of copper (Cu) and vertically grown carbon nanotubes (CNTs) as a possible …

NASA 2009 Body of Knowledge (BoK) Through-Slicon Via Technology

D Gerke - 2009 - ntrs.nasa.gov
Through-silicon via (TSV) is the latest in a progression of technologies for stacking silicon
devices in three dimensions (3D). Driven by the need for improved performance, methods to …

Electrical modeling and characterization of through silicon via for three-dimensional ICs

G Katti, M Stucchi, K De Meyer… - IEEE transactions on …, 2009 - ieeexplore.ieee.org
Three-dimensional ICs provide a promising option to build high-performance compact SoCs
by stacking one or more chips vertically. Through silicon vias (TSVs) form an integral …