Hardware realization of GMSK system using pipelined CORDIC module on FPGA

R Kajur, KV Prasad - Applied Informatics and Cybernetics in Intelligent …, 2020 - Springer
GMSK system is used in many diverse communication systems and which provides compact
spectral Bandwidth and high spectral efficiency for next-generation communication systems …

[PDF][PDF] Design and analysis of optimized CORDIC based GMSK system on FPGA platform.

R Kajur, KV Prasad - International Journal of Electrical & Computer …, 2020 - academia.edu
The gaussian minimum shift keying (GMSK) is one of the best suited digital modulation
schemes in the global system for mobile communication (GSM) because of its constant …

Software and Hardware Collaborative Design of PMSM FOC System Based on CORDIC Algorithm Improvement

H Zhi, J Jiao - 2023 19th International Conference on Natural …, 2023 - ieeexplore.ieee.org
The field-oriented control (FOC) algorithm for permanent magnet synchronous motor
(PMSM) is limited by the processing power of the microcontroller, which affects the control …

Efficient MUX based CORDIC on FPGA for signal processing application

T Meenpal - 2019 IEEE International Conference on …, 2019 - ieeexplore.ieee.org
This paper presents the high speed and area achieved using the Coordinate Rotation
Digital Computer (CORDIC) algorithm for digital signal processing applications. There are …

VLSI-design and FPGA-implementation of GMSK-demodulator architecture using CORDIC engine for low-power application

L Kumar, DK Mittal, R Shrestha - 2016 IEEE Annual India …, 2016 - ieeexplore.ieee.org
This paper proposes low-power design of the Gaussian-Minimum Shift-Keying (GMSK)
demodulator using baseband quadrature signals. High-level architecture of this …

[PDF][PDF] Performance analysis of CORDIC architectures targeted for FPGA devices

B Khurshid, GM Rather, N Hakim - International Journal of …, 2012 - researchgate.net
Digital Signal Processing domain has long been dominated by software systems; however,
the state of art signal processing is now again switching back to hardware based solutions …

FPGA based Implementation of Low power CORDIC architecture

SC Inguva, JB Seventline - 2019 International Conference on …, 2019 - ieeexplore.ieee.org
The coordinate rotation digital computer (CORDIC) is a shift-add algorithm used for rotating
vectors in a plane. Several techniques are proposed in the literature for calculation of …

Design and Implementation of High Frequency Functional Signal Generator using DDFS based on 16-stage pipelined CORDIC architecture

K Mohanty, DR Reddy, P Chitra… - 2022 3rd …, 2022 - ieeexplore.ieee.org
Frequency synthesizer has been used in numerous communication applications. This is
acknowledged as the heart of the electronics systems. Numerically controlled oscillator …

FPGA implementation of asynchronous mousetrap pipelined radix-2 CORDIC algorithm

A Changela, M Zaveri, A Lakhlani - … Conference on Current …, 2018 - ieeexplore.ieee.org
The COordinate Rotation DIgital Computer (CORDIC) is a special purpose algorithm to
compute trigonometry functions. CORDIC has achieved attention of many researchers …

Implementation Method of CORDIC Algorithm to Improve DDFS Performance

W Chen, T Wu, W Tang, K Jin… - 2020 IEEE 3rd …, 2020 - ieeexplore.ieee.org
An improved CORDIC (Coordinated Rotation Digital Computer) algorithm based on small
capacity ROM is proposed. The method of angle binary to bipolar recoding eliminates the …