Design of very high-speed pipeline FIR filter through precise critical path analysis

SM Cho, PK Meher, LTN Trung, HJ Cho, SY Park - ieee access, 2021 - ieeexplore.ieee.org
In this paper, we propose a new hardware architecture of a very high-speed finite impulse
response (FIR) filter using fine-grained seamless pipelining. The proposed full-parallel …

High throughput and energy efficient FIR filter architectures using retiming and two level pipelining

P Patali, ST Kassim - Procedia Computer Science, 2020 - Elsevier
A methodology to improve the throughput and energy efficiency of finite impulse response
(FIR) filters through the effective application of retiming and two-level pipelining is presented …

High-Performance IIR Filter Implementation Using FPGA

V Vijay, VRS Rao, K Chaitanya… - … on Recent Trends in …, 2022 - ieeexplore.ieee.org
This document investigation is performed on improved implementation of an Infinite Impulse
Response (IIR) filter which can utilized practically. There are many other proposed models …

FPGA Implementation of Systolic FIR Filter Using Single-Channel Method

AR Kumar, KHLP Prasad, B Sriraj… - 2023 13th International …, 2023 - ieeexplore.ieee.org
High-performance Finite Impulse Response (FIR) filters are required by numerous
industries, including image processing, digital signal processing, communications, and …

Performance characteristics of parallel and pipelined implementation of FIR filters in FPGA platform

G Deepak, PK Meher, A Sluzek - … International Symposium on …, 2007 - ieeexplore.ieee.org
In this paper, we present area-delay and power-delay characteristics against varying levels
of parallel and pipelined implementations of finite impulse response (FIR) filter in FPGA …

FPGA architecture to perform symmetric extension on signals for handling border discontinuities in FIR filtering

KP Kumar, A Kanhe - Computers and Electrical Engineering, 2022 - Elsevier
This paper proposes a generalized hardware architecture for performing the half-sample
and whole-sample symmetric/anti-symmetric extension of a finite-length signal to handle the …

Scalable design of microprogrammed digital FIR filter for sensor processing subsystem

MS BenSaleh, SM Qasim, AA AlJuffri… - IEICE Electronics …, 2014 - jstage.jst.go.jp
In this letter, a novel scalable and modular design of direct form sequential finite impulse
response (FIR) filter using microprogrammed control unit is proposed that can be efficiently …

High performance IIR filter implementation on FPGA

D Datta, HS Dutta - Journal of Electrical Systems and Information …, 2021 - Springer
This paper presents an improved design of reconfigurable infinite impulse response (IIR)
filter that can be widely used in real-time applications. The proposed IIR design is realized …

Low-cost parallel FIR filter structures with 2-stage parallelism

C Cheng, KK Parhi - … Transactions on Circuits and Systems I …, 2007 - ieeexplore.ieee.org
Based on recently published low-complexity parallel finite-impulse response (FIR) filter
structures, this paper proposes a new parallel FIR Filter structure with less hardware …

Design and Implementation of Optimized FIR Filter using CSA and Booth Multiplier for High Speed Signal Processing

K Sravani, M Saisri, UV Sivani… - 2023 4th International …, 2023 - ieeexplore.ieee.org
The impulse response has a finite period in a finite impulse response filter (FIR). In various
applications of digital signal processing, a higher order FIR filter is necessary to achieve …