A low noise phase locked loop (PLL) frequency synthesizer implemented in 65 nm CMOS
technology is introduced. A VCO noise reduction method suited for short channel design is …

This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixed-
signal VCO and a digital processor are developed to accurately preset the frequency of VCO …

We designed a low power low phase noise phase locked loop (PLL) frequency synthesizer
for 2.4 GHz wireless communication applications. Current reusing technique and triple-well …

A wide tuning range low phase noise phase-locked loop (PLL) frequency synthesizer based
on Class-C voltage-controlled oscillator (VCO) for IEEE 802.11 ah is presented. Feedback …

The phase-locked loop (PLL) frequency synthesizer is a critical device of wireless
transceivers. It works as a local oscillator (LO) for frequency translation and channel …

In this paper, a new strategy of switchable CMOS phase-locked loop frequency synthesizer
is proposed, designed and fabricated in 0.5 μm n-well CMOS process. Cadence/Spectre …

This work presents the design and implementation of a 2.4 GHz low power fast-settling
frequency-presetting PLL frequency synthesizer in the 0.18 μm CMOS process. A low power …

A 40-GHz phase-locked loop (PLL) frequency synthesizer for 60-GHz wireless
communication applications is presented. The electrical characteristics of the passive …

A phase-locked loop (PLL) frequency synthesizer architecture for multiple-band applications
is presented. A dynamically-controlled switched tuning voltage-controlled oscillator (VCO) is …

A fully integrated phase-locked loop (PLL) frequency synthesizer for WLAN applications is
designed in a 0.13-µm CMOS process. In order to make the loop bandwidth constant across …