Given (i) a Boolean function,(ii) a set of arrival times at the inputs, and (iii) a gate library with
associated delay values, the exact delay synthesis problem asks for a circuit implementation …

The synthesis of delay lines (DLs) is a core task during the generation of matched delays,
ring oscillator clocks or delay monitors. The main figure of merit of a DL is the fidelity to track …

Estimation of the delay of a Boolean function from its functional description is an important
step towards design exploration at the register transfer level (RTL). This paper addresses …

Approximate computing is an emerging paradigm for error-tolerant applications. By
introducing a reasonable amount of inaccuracy, both the area and delay of a circuit can be …

The timing closure problem is one of the most important problems in the design automation.
However, the rapid increase of the impact of the process variation on circuit timing makes …

We propose a general circuit delay model that unifies all previous delay models, eg floating,
viability, and transition delays, and models introduced in this paper, eg delays by sequences …

We present an implementation of an algorithm for constructing provably fast circuits for a
class of Boolean functions with input signals that have individual starting times. We show …

Recently, many models show their superiority in sequence and parameter tuning. However,
they usually generate non-deterministic flows and require lots of training data. We thus …

Approximate computing is an emerging paradigm for error-tolerant applications. By
introducing a reasonable amount of inaccuracy, both the area and delay of a circuit can be …

Contemporary digitally controlled delay elements trade off power overheads and delay
quantization error. This paper proposes a new delay element that provides a balanced …