Methods and apparatus for high-speed data bus connection and fabric management

E Pilmore, D Meyer, M Haworth, S Taylor… - US Patent …, 2023 - Google Patents
Methods and apparatus for efficient scaling of fabric architectures such as those based on
PCIe technology, including up to very large fabrics and numbers of hosts/devices for use in …

Methods and apparatus for network interface fabric send/receive operations

E Badger - US Patent 11,403,247, 2022 - Google Patents
Methods and apparatus for improved send/receive operations in network interface fabrics. In
one exemplary embodiment, mechanisms and protocols for enhanced inter-process (and …

Register access in a distributed memory buffer system

SR Carlough, M Cebulla, SM Eickhoff… - US Patent …, 2020 - Google Patents
A memory system, architecture, and method for storing data in response to commands
received from a host is disclosed. The memory system includes a memory control circuit …

Method for delaying fundamental reset in power loss protection (PLP) enabled devices

JG Hahn, K Inbar, HG Hellwig - US Patent 11,157,439, 2021 - Google Patents
Apparatus and methods for protecting in-flight data during a fundamental reset of a SSD by a
connected host are presented. In embodiments, a controller for the SSD includes an input …

Vehicle control system and circuit device

Y Hosoi, Y Takahashi - US Patent App. 17/899,105, 2023 - Google Patents
US20230069232A1 - Vehicle control system and circuit device - Google Patents
US20230069232A1 - Vehicle control system and circuit device - Google Patents Vehicle …

Flexible and low power cache memory architecture

DM Cermak, SJ Sheafor - US Patent App. 18/053,610, 2023 - Google Patents
US20230148253A1 - Flexible and low power cache memory architecture - Google Patents
US20230148253A1 - Flexible and low power cache memory architecture - Google Patents …

Memory sequencer system and a method of memory sequencing using thereof

CH Teh, SC Lim - US Patent 11,442,878, 2022 - Google Patents
A memory sequencer system for external memory protocols including a control center and a
microcontroller; a control center network-on-chip having nodes connected point-to-point to …

Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system

SR Carlough, SM Eickhoff, PJ Meaney… - US Patent …, 2022 - Google Patents
One or more memory systems, architectural structures, and/or methods of storing information
in memory devices is disclosed to improve the data bandwidth and or to reduce the load on …

Methods and apparatus for DMA engine descriptors for high speed data systems

D Meyer - US Patent 11,392,528, 2022 - Google Patents
Methods and apparatus for improved data movement operations through interconnect fabric.
In one embodiment, Non-Transparent Bridge (NTB) technology used to perform data …

Methods and apparatus for fabric interface polling

E Badger - US Patent 11,593,288, 2023 - Google Patents
Methods and apparatus for efficient data transmit and receive operations using polling of
memory queues associated with interconnect fabric interface. In one embodiment, Non …