Escalating system-on-chip design complexity is pushing the design community to raise the
level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of …

This work discusses CHARM, a Composable Heterogeneous Accelerator-Rich
Microprocessor design that provides scalability, flexibility, and design reuse in the space of …

Noisy graph data and pattern variations are two thorny problems faced by mining frequent
subgraphs. Traditional exact-matching based methods, however, only generate patterns that …

Control and Data Flow Graph (CDFG) is a universal description of program behavior, which
is widely used in the co-design of software and hardware. The derivation of CDFG has been …

Despite considerable improvements in existing HLS tools, they still require designer
interventions to provide efficient synthesis results. This manual design space exploration …

This paper deals with semantics-preserving parallelism reduction methods for cyclo-static
dataflow applications. Parallelism reduction is the process of equivalent actors fusioning …

A complete factorization of all optimal (in terms of quick transition) time-varying FIR unitary
filter bank tree topologies is obtained. This has applications in adaptive subband coding …

Abstract Deep Neural Networks (DNNs) have achieved great success in a variety of
machine learning (ML) applications, delivering high-quality inferencing solutions in …

Many high-level synthesis (HLS) tools aim at the hardware translation of input programs with
relatively short loop bodies, often with a very regular control flow. However, codes from …

Program comprehension is one of the most important applications in decompilation. The
more abstract the decompilation result the better it is understood. Intrinsic function is …