A heuristic energy-aware approach for hard real-time systems on multi-core platforms

D He, W Mueller - Microprocessors and Microsystems, 2013 - Elsevier
Due to the rapidly growing requirements of low power consumption and long battery life, the
energy efficiency is becoming one of the most important concerns in the electronic system …

Combinational hardware Trojan detection using logic implications

N Cornell, K Nepal - 2017 IEEE 60th International Midwest …, 2017 - ieeexplore.ieee.org
This paper provides a proof-of-concept demonstration of the potential benefit of using logical
implications for detection of combinational hardware trojans. Using logic simulation, valid …

State-of-the-Art techniques for detecting transient errors in electrical circuits

N Alves - IEEE Potentials, 2011 - ieeexplore.ieee.org
A historical overview and the latest most promising techniques that allow the detection of a
single transient error in a circuit, is presented. The following are presented: transient or soft …

Compacting test vector sets via strategic use of implications

N Alves, J Dworak, I Bahar, K Nepal - Proceedings of the 2009 …, 2009 - dl.acm.org
As the complexity of integrated circuits has increased, so has the need for improving testing
efficiency. Unfortunately, the types of defects are also becoming more complex, which in turn …

Reliability-driven don't care assignment for logic synthesis

A Zukoski, MR Choudhury… - 2011 Design, Automation …, 2011 - ieeexplore.ieee.org
This paper describes two algorithms for the selective assignment of input don't cares (DCs)
for logical derating of input errors to enhance reliability. It is motivated by the observation …

[PDF][PDF] Dynamic test set selection using implication-based on-chip diagnosis

N Imbriglia, N Alves, J Dworak - 2010 - researchgate.net
Dynamic Test Set Selection using Implication-Based On-Chip Diagnosis Page 1 Dynamic Test
Set Selection using Implication-Based On-Chip Diagnosis By Nicholas Imbriglia Sc.B., Brown …

Improving the testability and reliability of sequential circuits with invariant logic

N Alves, K Nepal, J Dworak, RI Bahar - … of the 20th symposium on Great …, 2010 - dl.acm.org
In this paper, we propose the use of logic implications to enhance online error detection
capabilities and to improve the testing efficiency of an integrated circuit. These logic …

[PDF][PDF] Reducing Delay Time by Analyzing the Critical Path

A Buben - archive2.cra.org
Error detection for online circuits has been a topic of research for many years. Some
approaches are designed for complete coverage, and others for added detection that is very …

[PDF][PDF] Publications and Workshop Presentations

JL Dworak - research.brown.edu
Jennifer Lynn Dworak Publications and Workshop Presentations Page 1 Jennifer Lynn Dworak
Publications and Workshop Presentations Refereed Conference and Archival Journal …